SNAA421 November   2025 LMK05318B , LMK5B12204 , LMK5B33216 , LMK5B33414 , LMK5C33216A , LMK5C33414A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Start Here: Using TICS Pro for Configuration and Readback
    1. 1.1 TICS Pro Status Page
    2. 1.2 TICS Pro Default Setting
  5. 2Debug Procedure: From Device Start-Up to Locked Output State
    1. 2.1 Is the APLL Reference Valid?
      1. 2.1.1 Check Status of APLL Reference
      2. 2.1.2 Debug APLL Reference
    2. 2.2 Is the APLL Locked?
      1. 2.2.1 Check Status of APLL Lock
      2. 2.2.2 Debug APLL Lock
    3. 2.3 Is the DPLL Reference Valid?
      1. 2.3.1 Check Status of DPLL Reference Validation
      2. 2.3.2 Debug DPLL Reference Validation
    4. 2.4 Is the DPLL Selecting a Reference?
      1. 2.4.1 Check Status of DPLL Reference Selection
      2. 2.4.2 Debug DPLL Reference Selection
    5. 2.5 Is the DPLL Frequency Locked?
      1. 2.5.1 Check Status of DPLL Frequency Lock
      2. 2.5.2 Debug DPLL Frequency Lock
    6. 2.6 Is the DPLL Phase Locked?
      1. 2.6.1 Check Status of DPLL Phase Lock
      2. 2.6.2 Debug DPLL Phase Lock
  6. 3Summary
  7. 4References

2.1.2 Debug APLL Reference

If the status is undesired, run through the following debug steps:

  1. Check the external APLL reference by confirming the XO input termination.

    Confirm that the correct input termination scheme is used for the XO input. Refer to the LMK device data sheet or the TICS Pro Software for guidance.

  2. Check the external APLL reference by probing the XO input pins.

    Confirm the measured frequency and voltage swing meet the XO input requirements from the Electrical Characteristics table in the LMK device data sheet.

    Confirm the measured frequency and voltage swing are operating within the data sheet specification of the XO input. For example, if a 48MHz TCXO with a ± 1ppm frequency accuracy is used, then the probed frequency must be within 48MHz ± 1ppm. Use a frequency counter or phase noise analyzer to measure the frequency accurately instead of an oscilliscope which has inherent noise that causes inaccurate readings. Oscilliscopes can be used to check if the APLL is unlocked. However, due to the inaccuracy, oscilliscopes cannot be used to check if the APLL is properly frequency locked.

  3. Check the external APLL reference by buffering the XO input to an output.

    For certain LMK devices, the XO input clock can be buffered out to an output channel to provide insight on what the APLL "sees" as the APLL reference. The buffered output clock is useful for checking the XO input frequency when the XO input pins are not readily available for probing. Measure the buffered output clock with a phase noise analyzer to observe any abnormal degradation in phase noise or jitter.

  4. Check the internal APLL reference by confirming the cascaded APLL settings.

    Check that the cascaded source is configured properly and locked. Refer to Is the APLL Locked? for further APLL debug.