SCAS892D
February 2010 – July 2025
CDCE937-Q1
,
CDCEL937-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Control Terminal Setting
8.3.2
Default Device Setting
8.4
Device Functional Modes
8.4.1
SDA and SCL Serial Interface
8.5
Programming
8.5.1
Data Protocol
8.5.2
Command Code Definition
8.5.3
Generic Programming Sequence
8.5.4
Byte Write Programming Sequence
8.5.5
Byte Read Programming Sequence
8.5.6
Block Write Programming Sequence
8.5.7
Block Read Programming Sequence
8.5.8
Timing Diagram for the SDA and SCL Serial Control Interface
8.5.9
SDA and SCL Hardware Interface
9
Register Maps
9.1
SDA and SCL Configuration Registers
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Spread-Spectrum Clock (SSC)
10.2.2.2
PLL Frequency Planning
10.2.2.3
Crystal Oscillator Start-Up
10.2.2.4
Frequency Adjustment With Crystal Oscillator Pulling
10.2.2.5
Unused Inputs and Outputs
10.2.2.6
Switching Between XO and VCXO Mode
10.2.3
Application Curves
10.3
Power Supply Recommendations
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
10.4
Layout