SLAU966 February   2025 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0C1105 , MSPM0C1106 , MSPM0C1106-Q1 , MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1 , MSPM0H3216 , MSPM0L1105 , MSPM0L1106 , MSPM0L1116 , MSPM0L1117 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2228

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of NXP M0 MCUs to MSPM0
  5. 2Ecosystem and Migration
    1. 2.1 Software Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 MCUXpresso IDE vs Code Composer Studio IDE (CCS)
      3. 2.1.3 MCUXpresso Code Configuration Tool vs SysConfig
    2. 2.2 Hardware Ecosystem
    3. 2.3 Debug Tools
    4. 2.4 Migration Process
    5. 2.5 Migration and Porting Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
        1. 3.2.2.1 Memory Banks
        2. 3.2.2.2 Flash Memory Regions
        3. 3.2.2.3 NONMAIN Memory
    3. 3.3 Power Up and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Power Modes
      3. 3.5.3 Entering Lower-Power Modes
    6. 3.6 Interrupt and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
      2. 3.6.2 Event Handler and Extended Interrupt and Event Controller (EXTI)
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Bootstrap Loader (BSL) Programming Options
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 I2C
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)
  9. 6References

General-Purpose I/O (GPIO, IOMUX)

MSPM0 GPIO functionality covers all of the features offered by the S32K1xx , KEA128x devices, and KM35x with additional functionality. NXP uses the term GPIO to refer to the pins that can be set, reset, or toggle. However, MSPM0 uses a slightly different nomenclature, namely:

  • MSPM0 GPIO refers to the hardware capable of reading and writing IO, generating interrupts, and so forth.
  • MSPM0 IOMUX refers to the hardware responsible for connecting different internal digital peripherals to a pin. IOMUX services many different digital peripherals, including, but not limited to, GPIO.

The MSPM0 GPIO and IOMUX modules cover the same functionality as NXP's GPIO, PORT, and TRGMUX/SMU modules. MSPM0 devices also offer several additional functions that are unavailable for NXP S32K1xx, KEA128x, and KM35x devices.

Table 4-1 GPIO Feature Comparison
FeatureS32K1xxKEA128xKM35xMSPM0G, MSPM0L,MSPM0C
Output modesPush-pull
Open drain with pullup or pulldown
Push-pull
Open drain with pullup
Push-pull
Open drain with pullup or pulldown
Push-pull
Open drain with pullup or pulldown
GPIO speed selectionSynchronous path 1.5*tmax = 31.25ns @48MHz
Asynchronous path: 50ns
10.2ns rise time, 9.5ns fall time8.0ns rise time, 5.0ns fall timeODIO pins: 120ns
All others: 0.3*fmax = 3.75ns @ 80MHz
High-drive GPIO12mA Per High drive port pin20mAYesEquivalent, called High Drive IO (HDIO)
Input modesFloating
Pull-up/Pull-down
Analog
Floating
Pull-up
Analog
Floating
Pull-up/Pull-down
Analog
Equivalent
Atomic bit set and resetYesYesYesEquivalent
Alternate functionsConfigured with Signal Multiplexing UnitConfigured with PORT moduleConfigured with PORT moduleEquivalent
MSPM0 uses IOMUX
Wake-upGPIO pin interruptN/AEquivalentEquivalent
GPIO controlled by DMAYesNoYesYes
User controlled input filtering to reject glitches less than 1, 3, or 8 ULPCLK periodsEquivalentEquivalentEquivalentYes
User controllable input hysteresisYesYesNoYes

GPIO code examples

Information about GPIO code examples can be found in the MSPM0 SDK examples guide.