SLAU966 February   2025 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0C1105 , MSPM0C1106 , MSPM0C1106-Q1 , MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1 , MSPM0H3216 , MSPM0L1105 , MSPM0L1106 , MSPM0L1116 , MSPM0L1117 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2228

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of NXP M0 MCUs to MSPM0
  5. 2Ecosystem and Migration
    1. 2.1 Software Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 MCUXpresso IDE vs Code Composer Studio IDE (CCS)
      3. 2.1.3 MCUXpresso Code Configuration Tool vs SysConfig
    2. 2.2 Hardware Ecosystem
    3. 2.3 Debug Tools
    4. 2.4 Migration Process
    5. 2.5 Migration and Porting Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
        1. 3.2.2.1 Memory Banks
        2. 3.2.2.2 Flash Memory Regions
        3. 3.2.2.3 NONMAIN Memory
    3. 3.3 Power Up and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Power Modes
      3. 3.5.3 Entering Lower-Power Modes
    6. 3.6 Interrupt and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
      2. 3.6.2 Event Handler and Extended Interrupt and Event Controller (EXTI)
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Bootstrap Loader (BSL) Programming Options
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 I2C
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)
  9. 6References

3.2.1 Flash Features

The MSPM0 and NXP family of MCUs feature nonvolatile Flash memory used for storing executable program code and application data.

Table 3-2 Comparison of Flash Feature
Features S32K1xx KEA128x

KM35

 MSPM0G MSPM0L MSPM0C
Flash memory Up to 2MB program/ 64KB FlexNVM data 64KB Up to 512KB 128KB to 32KB 64KB to 8KB 16KB to 8KB
Memory organization 1 to 3 Blocks Single Block Single Block
Block (bank) size Up to 512KB 64KB Up to 512KB 256KB
Sector size 2KB 512B 2KB 1KB
Flash word size 128 / 64 bits 64 bits 64 bits plus 8 ECC bits

64-bit, Refer to device-specific data sheet if ECC is supported
Programming resolution 32-, 16-, or 8-bit (byte) 64-bit Flash word 64-bit Flash word, (32-, 16-, or 8-bit, see the device-specific Technical Reference Manual)
Erase Page Erase
Chip erase (all banks)		 N/A Sector 2KB Sector Erase 1KB / Bank Erase (up to 256KB)
Write protection Yes, static Yes, static and dynamic
Read protection No Yes No Yes
Flash memory read operations 128-bit Flash word 128-bit Flash word 64-bit Flash word 64-bit Flash word size plus 8 ECC bits
Flash memory write operations Yes Yes Yes 64-bit Flash word size + 8 ECC bits 64-bit Flash word size, if ECC is supported, see the device-specific data sheet
FlexNVM (Data and EEPROM emulation) Read / Write 32-, 16-, or 8-bit N/A N/A N/A
Error code correction (ECC) Yes Yes No 8 bits for 64 bits Refer to device specific datasheet if ECC is supported
Prefetch Yes No No Yes No

In addition to the Flash memory features listed in the previous table, the MSPM0 Flash memory also has the following features:

  • In-circuit program and erase supported across the entire supply voltage range
  • Internal programming voltage generation
  • Support for EEPROM emulation with up to 100 000 program/erase cycles on the lower 32KB of the Flash memory, with up to 10 000 program/erase cycles on the remaining Flash memory (devices with 32KB support 100 000 cycles on the entire Flash memory)