SLUUAQ3A April 2016 – October 2022 BQ4050
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Fuse | Permanent Fail Fuse B | H1 | 0x0 | 0xFF | 0 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD | RSVD | VIMA | VIMR | RSVD | RSVD | RSVD |
| Fuse blow action for PFStatus() bits: | ||
| RSVD (Bits 7–5): Reserved. Do not use. | ||
| VIMA (Bit 4): Voltage imbalance when active | ||
| 1 = | Enabled | |
| 0 = | Disabled (default) | |
| VIMR (Bit 3): Voltage imbalance at rest | ||
| 1 = | Enabled | |
| 0 = | Disabled (default) | |
| RSVD (Bits 2–0): Reserved. Do not use. | ||