SNAU318 June   2025 LMX1205

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 Jumper Information
    3. 2.3 Multiplier Lock Detect Jumper
    4. 2.4 Setup
      1. 2.4.1 Evaluation Setup Requirement
      2. 2.4.2 Connection Diagram
    5. 2.5 Power Requirements
    6. 2.6 Reference Clock
    7. 2.7 Output Connections
    8. 2.8 Test Points
  7. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 USB2ANY Interface
  8. 4Implementation Results
    1. 4.1 Buffer Mode
    2. 4.2 Multiplier and Divider Modes
    3. 4.3 Logic Clock
    4. 4.4 Programmable Delay
  9. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  10. 6Additional Information
    1. 6.1 Trademarks

4.1 Buffer Mode

After a POR or soft reset, LMX1205 powers up is buffer mode, and all outputs are enabled with maximum output power. LOGICLK is also enabled in this mode, with a fixed divider value of 64. All SYSREF clocks are disabled. To evaluate the device in a different configuration, use TICS Pro.

To specify the device, select the MultisiteBoard page, then select the device from the Select Device drop down menu.

LMX1205MSEVM Software Configuration for Device Selection Figure 4-1 Software Configuration for Device Selection

From the top-menu, select Default Configuration and then select Buffer Mode. The Buffer Mode selection automatically loads the buffer mode profile.

LMX1205MSEVM Software Configuration to set the Buffer Mode Figure 4-2 Software Configuration to set the Buffer Mode

If termination is not applied on all output pins, manually disable the unused outputs. Use the CHx_EN fields to completely power down unused channels or the CLKOUTx_EN fields to only power down output buffers. Powering down unused channels reduces current consumption.

Load the profile and make and required changes. Select USB Communications then select Write All Registers to program the device.

In the figures below, the yellow trace is the 1GHz source clock from Crystek RedBox Source CRBSCS-01-1000.000. The green and orange traces are the clockouts from primary, secondary1 and secondary2.

The figures below show that the magnitude of additive far-off noise from the LMX1205 is very low, approximately −163dBc/Hz.

Figure 4-3 shows:

  • Source noise
  • Source and primary DUT noise
  • Source, primary DUT, and secondary2 DUT noise (edge SMA)
  • Source, primary DUT, and secondary1 DUT noise (vertical SMA)
LMX1205MSEVM Phase Noise in Buffer Mode Figure 4-3 Phase Noise in Buffer Mode