SNOSDM1
December 2025
TLV6722
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Separate Power Supplies (H_VCC, M_VCC)
8.4.2
Low Supply Reset Deassertion
8.4.3
Power-On Reset (POR)
8.4.4
Inputs (INT/RSTn, LPWn/PRSn(/ePPS), M_INT)
8.4.5
Outputs (M_RSTn, M_LPWn, M_CLK)
8.4.6
Switching Thresholds and Hysteresis
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
Support Resources
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
1
Features
Compliant with OSFP and OSFP-XD MSAs
Precision integrated resistors
Integrated reference
Dual comparators
M_RSTn: Open-drain output
M_LPWn: Push-pull output
Internal hysteresis
Integrated clock buffer (TLV6723 and TLV6724)
Known start-up conditions
Separate host and module supplies:
H_VCC: 3.135V to 3.465V
M_VCC: 1.1V to H_VCC
-25°C to 105°C operating temperature range
Small size package:
1.2mm x 1.2mm DSBGA-9 (YBJ)