SNOSDM1 December   2025 TLV6722

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Separate Power Supplies (H_VCC, M_VCC)
      2. 8.4.2 Low Supply Reset Deassertion
      3. 8.4.3 Power-On Reset (POR)
      4. 8.4.4 Inputs (INT/RSTn, LPWn/PRSn(/ePPS), M_INT)
      5. 8.4.5 Outputs (M_RSTn, M_LPWn, M_CLK)
      6. 8.4.6 Switching Thresholds and Hysteresis
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Low Supply Reset Deassertion

TLV6722 TLV6723 TLV6724 M_RSTn Voltage vs. H_VCC
                    Voltage Figure 8-3 M_RSTn Voltage vs. H_VCC Voltage

M_RSTn is the hardware reset signal for the OSFP/OSFP-XD module system. The assertion of M_RSTn holds the module state machine in the reset steady state, so it's advantageous to know at what H_VCC voltage M_RSTn gets deasserted to make sure that downstream electronics properly wake-up. M_RSTn deassertion depends on many characteristics of the TLV672x such as H_VCC, VIT+, R2, and R3. To account for all of the factors that determine M_RSTn deassertion, the VWAKE_UP specification is provided as a value of H_VCC that results in a M_RSTn deassertion. This specification is a system-level specification that is measured with the host-side R1 (68kΩ resistor) to account for host-side contributions to INT/RSTn.

The above figure shows the M_RSTn output with a pull-up resistor to H_VCC while H_VCC ramps. In Region 1, H_VCC is below VPOR and active circuitry within the TLV672x is off, which results in the output being Hi-Z. In Region 2, H_VCC is above VPOR and there is now enough voltage headroom for internal circuitry to operate. However, INT/RSTn still remains below VIT+ due to the low H_VCC and the INT/RSTn resistive divider, so the M_RSTn is output low (reset asserted). In Region 3, H_VCC is high enough such that INT/RSTn exceeds VIT+, so the M_RSTn transitions to Hi-Z (reset deasserted).VWAKE_UP is the boundary at which M_RSTn gets deasserted for the OSFP module system to transition out of the reset steady state.