SNOSDM1 December   2025 TLV6722

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Separate Power Supplies (H_VCC, M_VCC)
      2. 8.4.2 Low Supply Reset Deassertion
      3. 8.4.3 Power-On Reset (POR)
      4. 8.4.4 Inputs (INT/RSTn, LPWn/PRSn(/ePPS), M_INT)
      5. 8.4.5 Outputs (M_RSTn, M_LPWn, M_CLK)
      6. 8.4.6 Switching Thresholds and Hysteresis
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics

H_VCC = 3.135V to 3.465V, M_VCC = 1.1V to H_VCC; TA = -25℃ to +105℃. Typical values are at 25℃ (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC Input Characteristics
VIT+ Comparator positive-going input threshold voltage 1.230 1.25 1.270 V
VIT- Comparator negative-going input threshold voltage 1.210 1.230 1.250 V
VHYS (1) Hysteresis 17 20 23 mV
VIH_M_INT M_INT high-level input voltage 0.7 × M_VCC V
VIL_M_INT M_INT low-level input voltage 0.3 × M_VCC V
Passives
R2 R2 Resistance 4.9 5 5.1 kΩ
R3 R3 Resistance 7.8 8 8.2 kΩ
R13 R13 Resistance 9.8 10 10.2 kΩ
DC Output Characteristics
VOL_M_RSTn M_RSTn voltage swing from GND INT/RSTn voltage at MSA Zone 1 conditions, ISINK = 1mA, H_VCC = 3.3V, M_VCC = 3.3V 70 300 mV
ILKG_M_RSTn M_RSTn open-drain output leakage current INT/RSTn voltage at MSA Zone 2 and Zone 3 conditions, H_VCC = 3.3V, M_VCC = 3.3V, M_RSTn = 3.3V 150 pA
ISC_M_RSTn M_RSTn short-circuit current INT/RSTn voltage at MSA Zone 1 conditions, output sinking current, H_VCC = 3.3V, M_VCC = 3.3V, M_RSTn = 3.3V
40		 mA
VOL_M_LPWn M_LPWn voltage swing from GND LPWn/PRSn(/ePPS) voltage at MSA Zone 1 conditions, ISINK = 1mA, H_VCC = 3.3V, M_VCC = 3.3V 70 300 mV
VOL_M_LPWn M_LPWn voltage swing from GND LPWn/PRSn(/ePPS) voltage at MSA Zone 1 conditions, ISINK = 100uA, H_VCC = 3.3V, M_VCC = 1.1V 15 100 mV
VOH_M_LPWn M_LPWn voltage swing from M_VCC LPWn/PRSn(/ePPS) voltage at MSA Zone 2 conditions, ISOURCE = 1mA, H_VCC = 3.3V, M_VCC = 3.3V 80 300 mV
VOH_M_LPWn M_LPWn voltage swing from M_VCC LPWn/PRSn(/ePPS) voltage at MSA Zone 2 conditions, ISOURCE = 100uA, H_VCC = 3.3V, M_VCC = 1.1V 20 100 mV
ISC_M_LPWn M_LPWn short-circuit current LPWn/PRSn(/ePPS) voltage at MSA Zone 1 conditions, output sinking current, H_VCC = 3.3V, M_VCC = 3.3V 40 mA
ISC_M_LPWn M_LPWn short-circuit current LPWn/PRSn(/ePPS) voltage at MSA Zone 1 conditions, output sinking current, H_VCC = 3.3V, M_VCC = 1.1V 1.7 mA
ISC_M_LPWn M_LPWn short-circuit current LPWn/PRSn(/ePPS) voltage at MSA Zone 2 conditions, output sourcing current, H_VCC = 3.3V, M_VCC = 3.3V 30 mA
ISC_M_LPWn M_LPWn short-circuit current LPWn/PRSn(/ePPS) voltage at MSA Zone 2 conditions, output sourcing current, H_VCC = 3.3V, M_VCC = 1.1V 1.3 mA
Device Power
IQ (TLV6722) (2) Quiescent current INT/RSTn = LPWn/PRSn = Floating, M_INT = M_VCC, No load on all outputs 3.9 15 µA
VPOR_H_VCC Host supply Power-On Reset Voltage 1.5 V
tON Power-on time 500 µs
VWAKE_UP(3) Host supply to deassert M_RSTn 68kΩ connected from INT/RSTn to GND, M_INT = GND, LPWn/PRSn = floating 2.2 V
(1) VHYS = VIT+ - VIT-
(2) Quiescent current shown is the sum of the current through H_VCC and M_VCC. Contributions to the quiescent current from current through M_VCC is negligible when compared to current through H_VCC.
(3) H_VCC voltage at which M_RSTn gets deasserted (transitions from output low to Hi-Z). See Parameter Measurement Information for specification test circuit.