SNOSDM1 December   2025 TLV6722

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Separate Power Supplies (H_VCC, M_VCC)
      2. 8.4.2 Low Supply Reset Deassertion
      3. 8.4.3 Power-On Reset (POR)
      4. 8.4.4 Inputs (INT/RSTn, LPWn/PRSn(/ePPS), M_INT)
      5. 8.4.5 Outputs (M_RSTn, M_LPWn, M_CLK)
      6. 8.4.6 Switching Thresholds and Hysteresis
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Thermal Information

THERMAL METRIC (1) TLV6722 UNIT
YBJ (DSBGA)
9 PINS
RθJA Junction-to-ambient thermal resistance 110.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.7 °C/W
RθJB Junction-to-board thermal resistance 32.1 °C/W
ΨJT Junction-to-top characterization parameter 0.3 °C/W
ΨJB Junction-to-board characterization parameter 32.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.