SNVSCS7D April   2025  – November 2025 TPSM33606-Q1 , TPSM33610-Q1 , TPSM33620-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range
      2. 7.3.2  Output Voltage Selection
        1. 7.3.2.1 Adjustable Output Voltage Variants
        2. 7.3.2.2 Fixed Output Voltage Variants
      3. 7.3.3  Enable, Start-Up, and Shutdown
        1. 7.3.3.1 External UVLO through the EN Pin
      4. 7.3.4  External CLK SYNC
        1. 7.3.4.1 Pulse-Dependent MODE/SYNC Pin Control
      5. 7.3.5  Power-Good Output Operation
      6. 7.3.6  Internal LDO, VCC and VOUT/FB Input
      7. 7.3.7  Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
      8. 7.3.8  Spread Spectrum
      9. 7.3.9  Soft Start and Recovery from Dropout
        1. 7.3.9.1 Recovery from Dropout
      10. 7.3.10 Overcurrent Protection (Hiccup Mode)
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 Auto Mode – Light-Load Operation
          1. 7.4.3.2.1 Diode Emulation
          2. 7.4.3.2.2 Frequency Reduction
        3. 7.4.3.3 FPWM Mode – Light-Load Operation
        4. 7.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 VCC
        6. 8.2.2.6 CFF Selection
        7. 8.2.2.7 Power-Good Signal
        8. 8.2.2.8 Maximum Ambient Temperature
        9. 8.2.2.9 Other Connections
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
      3. 9.1.3 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Maximum Ambient Temperature

As with any power conversion device, the TPSM336xx-Q1 dissipates internal power while operating. The effect of this power dissipation is to raise the internal temperature of the power module above ambient. The internal die and inductor temperature (TJ) is a function of the ambient temperature, the power loss, and the effective thermal resistance, RθJA, of the module and PCB combination. The maximum junction temperature for the TPSM336xx-Q1 must be limited to 150°C. This limit establishes a limit on the maximum module power dissipation and, therefore, the load current. Equation 9 shows the relationships between the important parameters. Seeing that larger ambient temperatures (TA) and larger values of RθJA reduce the maximum available output current is easy. The power module efficiency can be estimated by using the curves provided in this data sheet. If the desired operating conditions cannot be found in one of the curves, interpolation can be used to estimate the efficiency. Alternatively, the EVM can be adjusted to match the desired application requirements and the efficiency can be measured directly. The correct value of RθJA is more difficult to estimate. Lastly, safe-operation-area curves and module thermal captures developed through bench analysis on the EVM can be used to provide insights on the output power capability. These curves can be found in the Application Curves section of the data sheet.

As stated in the Semiconductor and IC Package Thermal Metrics application note the values given in the Thermal Information section are not valid for design purposes and must not be used to estimate the thermal performance of the application. The values reported in that table were measured under a specific set of conditions that are rarely obtained in an actual application.

Equation 9. I O U T , m a x = ( T J - T A ) R θ J A × η ( 1 - η ) × 1 V O U T

where

η is the efficiency.

The effective RθJA (TPSM33625EVM = 22°C/W) is a critical parameter and depends on many factors such as the following:

  • Power dissipation
  • Air temperature, flow
  • PCB area
  • Copper heat-sink area
  • Number of thermal vias under the package
  • Adjacent component placement

The IC power loss mentioned above is the overall power loss minus the loss that comes from the inductor DC resistance. The overall power loss can be approximated by using WEBENCH circuit design and selection simulation services for a specific operating condition and temperature.

Use the following resources as guides to excellent thermal PCB design and estimating RθJA for a given application environment: