SNVSCS7D April   2025  – November 2025 TPSM33606-Q1 , TPSM33610-Q1 , TPSM33620-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range
      2. 7.3.2  Output Voltage Selection
        1. 7.3.2.1 Adjustable Output Voltage Variants
        2. 7.3.2.2 Fixed Output Voltage Variants
      3. 7.3.3  Enable, Start-Up, and Shutdown
        1. 7.3.3.1 External UVLO through the EN Pin
      4. 7.3.4  External CLK SYNC
        1. 7.3.4.1 Pulse-Dependent MODE/SYNC Pin Control
      5. 7.3.5  Power-Good Output Operation
      6. 7.3.6  Internal LDO, VCC and VOUT/FB Input
      7. 7.3.7  Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
      8. 7.3.8  Spread Spectrum
      9. 7.3.9  Soft Start and Recovery from Dropout
        1. 7.3.9.1 Recovery from Dropout
      10. 7.3.10 Overcurrent Protection (Hiccup Mode)
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 Auto Mode – Light-Load Operation
          1. 7.4.3.2.1 Diode Emulation
          2. 7.4.3.2.2 Frequency Reduction
        3. 7.4.3.3 FPWM Mode – Light-Load Operation
        4. 7.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 VCC
        6. 8.2.2.6 CFF Selection
        7. 8.2.2.7 Power-Good Signal
        8. 8.2.2.8 Maximum Ambient Temperature
        9. 8.2.2.9 Other Connections
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
      3. 9.1.3 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Enable, Start-Up, and Shutdown

Voltage at the EN pin controls the start-up or remote shutdown of the TPSM336xx-Q1. The device stays shut down as long as the EN pin voltage is less than VEN_WAKE. With the voltage at the EN pin greater than VEN_WAKE, the device enters standby mode and the internal LDO powers up to generate VCC. As the EN voltage increases further, approaching VEN_RISE, the device finally starts to switch, entering start-up mode with a soft start. During the device shutdown process, when the EN input voltage measures less than (VEN_RISE – VEN_HYST), the regulator stops switching and re-enters device standby mode. Any further decrease in the EN pin voltage, below VEN_WAKE, and the device is then firmly shut down. The high-voltage compliant EN input pin can be connected directly to the VIN input pin if remote precision control is not needed. The EN input pin must not be allowed to float.

The various EN threshold parameters and the values are listed in the Electrical Characteristics. Figure 7-4 shows the precision enable behavior and Figure 7-5 shows a typical remote EN start-up waveform in an application. After EN goes high, after a delay of about 1ms, the output voltage begins to rise with a soft start and reaches close to the final value in about 3.5ms (tss). After a delay of about 2.5ms (tPG_FLT_RISE), the PGOOD flag goes high. During start-up, the device is not allowed to enter FPWM mode until the soft-start time has elapsed. This time is measured from the rising edge of EN.

TPSM33606-Q1 TPSM33610-Q1 TPSM33620-Q1 Precision Enable
                    Behavior Figure 7-4 Precision Enable Behavior
TPSM33606-Q1 TPSM33610-Q1 TPSM33620-Q1 Enable Start-Up VIN
                    = 24V, VOUT = 3.3V Figure 7-5 Enable Start-Up VIN = 24V, VOUT = 3.3V