SNVSCS7D April 2025 – November 2025 TPSM33606-Q1 , TPSM33610-Q1 , TPSM33620-Q1
PRODUCTION DATA
For a 3.3V output, the TPSM336xx-Q1 requires a minimum of 40µF effective output capacitance for proper operation. The effects of DC bias and temperature variation must be considered when using ceramic capacitance. Additional output capacitance can be added to reduce ripple voltage or for applications with transient load requirements.
In practice, the output capacitor has the most influence on the transient response and loop-phase margin. Load transient testing and bode plots are the best way to validate any given design and must always be completed before the application goes into production. In addition to the required output capacitance, a small ceramic capacitor placed on the output node can help reduce high-frequency noise. Small-case size ceramic capacitors in the range of 1nF to 100nF can be very helpful in reducing spikes on the output node caused by the board parasitics.
Limit the maximum value of total output capacitance to about 10 times the design value, or 1000µF, whichever is smaller. Large values of output capacitance can adversely affect the start-up behavior of the regulator as well as the loop stability. If values larger than noted here must be used, then a careful study of start-up at full load and loop stability must be performed.
For this design example, select 2 × 22µF, 16V, 1210 case size, ceramic capacitors, which have a total effective capacitance of approximately 40µF at 3.3V. Review Section 6.3 for example output capacitor selection.