2 Guidelines for PCB Stack-Up

The PCB stack-up (or layer assignment) is an important factor in ensuring optimal performance of a power distribution scheme. An optimized PCB stack-up for improved power integrity performance can be achieved by following these recommendations:

• Power and ground plane pairs/”islands” should be closely coupled together. The capacitance formed between the planes can be used to decouple the power supply. Whenever possible the power and ground planes should be solid to provide a continuous return path for return current.
• Use a thin dielectric between the power and ground plane pair. Capacitance is inversely proportional to the separation of the plane pair so minimizing the separation distance (the dielectric thickness) will help to maximize the capacitance.
• Keep the power and ground plane pair as close to the PCB top and bottom surfaces as possible (see Figure 2-1). This will help to minimize the associated loop inductance of the decoupling capacitors, vias, and the power/ground plane pair spreading loop inductance.

The placement of power and ground planes in the PCB stack-up (determined by layer assignment) has a significant impact on the parasitic inductance of the power current path as shown above. For this reason, it is recommended to consider layer order in the early stages of the PCB PDN design cycle, putting high priority supplies in the top half of the stack-up and low-priority supplies in the bottom half of the stack-up as shown in the examples below. Figure 2-2 and Figure 2-3 show examples of typical PCB stack-ups designed with power distribution performance in mind. Device-specific stack-up examples can be found in Section 8.