SPRZ455F December 2020 – February 2025 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
USART Spurious DMA Interrupts
Spurious DMA interrupts may occur when DMA is used to access TX/RX FIFO with a non-power-of-2 trigger level in the TLR register.
Use power of 2 values for TX/RX FIFO trigger levels (1, 2, 4, 8, 16, and 32).