4-Bit Bidirectional Multi-Voltage Level Translator for Open-Drain & Push- Pull
Product details
Parameters
Package | Pins | Size
Features
- Provides bidirectional voltage translation with no direction terminal
- Supports up to 100-MHz up translation and greater than 100-MHz down translation
at ≤ 30-pF capacitor load and up to 40-MHz up/down translation at 50-pF capacitor load - Supports Ioff, partial power-down mode (refer to Feature Description)
- Allows bidirectional voltage level translation between
- 0.8 V ↔ 1.8, 2.5, 3.3, 5 V
- 1.2 V ↔ 1.8, 2.5, 3.3, 5 V
- 1.8 V ↔ 2.5, 3.3, 5 V
- 2.5 V ↔ 3.3, 5 V
- 3.3 V ↔ 5 V
- Low standby current
- 5 V Tolerance I/O port to support TTL
- Low Ron provides less signal distortion
- High-impedance I/O terminals for EN = Low
- Flow-through pinout for easy PCB trace routing
- Latch-up performance exceeds 100 mA per JESD17
- –40°C to 125°C operating temperature range
- ESD performance tested per JESD 22
- 2000-V human-body model (A114-B, Class II)
- 200-V machine model (A115-A)
- 1000-V charged-device model (C101)
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Description
The LSF family consists of bidirectional voltage level translators that operate from 0.8 V to 4.5 V (Vref_A) and 1.8 V to 5.5 V (Vref_B). This range allows for bidirectional voltage translations between 0.8 V and 5.0 V without the need for a direction terminal in open-drain or push-pull applications. The LSF family supports level translation applications with transmission speeds greater than 100 MHz for open-drain systems that utilize a 15-pF capacitance and 165-Ω pull-up resistor.
When the An or Bn port is LOW, the switch is in the ON-state and a low resistance connection exists between the An and Bn ports. The low Ron of the switch allows connections to be made with minimal propagation delay and signal distortion. The voltage on the A or B side will be limited to Vref_A and can be pulled up to any level between Vref_A and 5 V. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control.
The supply voltage (Vpu#) for each channel may be individually set up with a pull up resistor. For example, CH1 may be used in up-translation mode (1.2 V ↔ 3.3 V) and CH2 in down-translation mode (2.5 V ↔ 1.8 V).
When EN is HIGH, the translator switch is on, and the An I/O is connected to the Bn I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. The EN input circuit is designed to be supplied by Vref_A. EN must be LOW to ensure the high-impedance state during power-up or power-down.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | LSF0204x 4-Bits Bidirectional Multi-Voltage Level Translator for Open-Drain and Push-Pull Application datasheet (Rev. G) | Nov. 25, 2019 |
Selection guide | Voltage translation buying guide | Jun. 13, 2019 | |
Application note | Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators | Oct. 30, 2017 | |
User guide | LSF-EVM Hardware User's Guide | Jul. 05, 2017 | |
User guide | LSF010X Evaluation Module User's Guide (Rev. A) | Jun. 29, 2015 | |
Application note | Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) | Apr. 30, 2015 | |
Application note | Voltage-Level Translation With the LSF Family (Rev. B) | Mar. 12, 2015 | |
Application note | Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. A) | Jul. 08, 2004 | |
Application note | Selecting the Right Level Translation Solution (Rev. A) | Jun. 22, 2004 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic and translation devices with included dual supply support
- Board has 9 sections that can be broken apart for a smaller form factor
Description
The LSF family of devices are level translators that support a voltage range of 0.95V and 5V and provide multi-voltage bidirectional translation without a direction pin.
The LSF-EVM comes populated with the LSF0108PWR device and has landing patterns that are compatible with the LSF0101DRYR (...)
Features
- Supports all devices in the LSF family of level translators (LSF0101, LSF0102, LSF0204, LSF0108)
- Layout optimized for high speed operation (up to 100 MHz up translation and greater than 100 MHz down translation)
- Includes various connection interfaces including edge-mount SMB and differential probe (...)
Design tools & simulation
Reference designs
Design files
-
download TIDA-01012 BOM.pdf (135KB) -
download TIDA-01012 Assembly Drawing.pdf (639KB) -
download TIDA-01012 PCB.pdf (1928KB) -
download TIDA-01012 CAD Files.zip (1908KB) -
download TIDA-01012 Gerber.zip (1021KB)
Design files
-
download TIDA-01014 BOM.pdf (165KB) -
download TIDA-01014 Assembly Drawing.pdf (636KB) -
download TIDA-01014 PCB.pdf (4433KB) -
download TIDA-01014 CAD Files.zip (1901KB) -
download TIDA-01014 Gerber.zip (1229KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
DSBGA (YZP) | 12 | View options |
TSSOP (PW) | 14 | View options |
UQFN (RUT) | 12 | View options |
VQFN (RGY) | 14 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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