Home Logic Gate NAND gate

SN54ALS133

ACTIVE
Order now

Military single 13-input, 4.5-V to 5.5-V bipolar NAND gate

Data sheet
Top
Military single 13-input, 4.5-V to 5.5-V bipolar NAND gate

SN54ALS133

ACTIVE
Data sheet Order now

Product details

Parameters

Technology Family ALS Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Channels (#) 1 Inputs per channel 13 IOL (Max) (mA) 0.4 IOH (Max) (mA) -8 Input type Bipolar Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (Max) (Mbps) 75 Rating Catalog, Military Operating temperature range (C) -55 to 125 open-in-new Find other NAND gate

Package | Pins | Size

CDIP (J) 16 135 mm² 19.65 x 6.92 CFP (W) 16 69 mm² 10 x 6.7 LCCC (FK) 20 79 mm² 8.89 x 8.89 open-in-new Find other NAND gate

Features

  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

 open-in-new Find other NAND gate

Description

These devices contain a 13-input positive-NAND gate. They perform the following Boolean functions in positive logic:


Y=A\+B\+C\+D\+E\+F\+G\+H\+I\+J\+K\+L\+M\

The SN54ALS133 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS133 is characterized for operation from 0°C to 70°C.

 

 

 open-in-new Find other NAND gate
Download

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 14
Type Title Date
* Datasheet 13-Input Positive-NAND Gates datasheet (Rev. B) Dec. 01, 1994
* SMD SN54ALS133 SMD 5962-88590 Jun. 21, 2016
Technical article How to keep your motor running safely Jun. 04, 2020
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

CAD/CAE symbols

Package Pins Download
CDIP (J) 16 View options
CFP (W) 16 View options
LCCC (FK) 20 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Training series

View all TI training and videos

Videos