The TPS40200 is a flexible, non-synchronous controller with a built-in 200-mA driver for
P-channel FETs. The circuit operates with inputs up to 52 V with a power-saving feature that turns
off driver current once the external FET has been fully turned on. This feature extends the
flexibility of the device, allowing it to operate with an input voltage up to 52 V without
dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward
input voltage compensation that responds instantly to input voltage change. The integral 700-mV
reference is trimmed to 2%, providing the means to accurately control low voltages. The TPS40200 is
available in an 8-pin SOIC and an 8-pin VSON package and supports many of the features of more
complex controllers. Clock frequency, soft-start, and overcurrent limits are each easily programmed
by a single, external component. The part has undervoltage lockout, and can be easily synchronized
to other controllers or a system clock to satisfy sequencing and/or noise-reduction
requirements.
The TPS40200 is a flexible, non-synchronous controller with a built-in 200-mA driver for
P-channel FETs. The circuit operates with inputs up to 52 V with a power-saving feature that turns
off driver current once the external FET has been fully turned on. This feature extends the
flexibility of the device, allowing it to operate with an input voltage up to 52 V without
dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward
input voltage compensation that responds instantly to input voltage change. The integral 700-mV
reference is trimmed to 2%, providing the means to accurately control low voltages. The TPS40200 is
available in an 8-pin SOIC and an 8-pin VSON package and supports many of the features of more
complex controllers. Clock frequency, soft-start, and overcurrent limits are each easily programmed
by a single, external component. The part has undervoltage lockout, and can be easily synchronized
to other controllers or a system clock to satisfy sequencing and/or noise-reduction
requirements.