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UCC27524A

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5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and negative input voltage handling

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Data sheet

UCC27524A

ACTIVE
Data sheet Order now

Product details

Number of channels (#) 2 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 5 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 18 Features Enable Pin Operating temperature range (C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Prop delay (ns) 13 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (Typ) 4 Driver configuration Dual, Non-Inverting
Number of channels (#) 2 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 5 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 18 Features Enable Pin Operating temperature range (C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Prop delay (ns) 13 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (Typ) 4 Driver configuration Dual, Non-Inverting
HVSSOP (DGN) 8 9 mm² 3 x 3 SOIC (D) 8 19 mm² 4.9 x 3.9
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Ability to Handle Negative Voltages (–5 V)
    at Inputs
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO (Ensures
    Glitch-Free Operation at Power Up and Power Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2-Channels
  • Two Outputs are Paralleled for Higher Drive
    Current
  • Outputs Held in Low When Inputs Floating
  • SOIC-8, HVSSOP-8 PowerPAD Package Options
  • Operating Temperature Range of –40 to 140°C
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Ability to Handle Negative Voltages (–5 V)
    at Inputs
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO (Ensures
    Glitch-Free Operation at Power Up and Power Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2-Channels
  • Two Outputs are Paralleled for Higher Drive
    Current
  • Outputs Held in Low When Inputs Floating
  • SOIC-8, HVSSOP-8 PowerPAD Package Options
  • Operating Temperature Range of –40 to 140°C

The UCC27524A device is a dual-channel, high-speed, low-side, gate-driver device capable of effectively driving MOSFET and IGBT power switches. The UCC27524A is a variant of the UCC2752x family. The UCC27524A adds the ability to handle –5 V directly at the input pins for increased robustness. The UCC27524A is a dual non-inverting driver. Using a design that inherently minimizes shoot-through current, the UCC27524A is capable of delivering high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay typically 13 ns. In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with a single input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

For safety purpose, internal pull-up and pull-down resistors on the input pins of the UCC27524A ensure that outputs are held LOW when input pins are in floating condition. UCC27524A features Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC27524A family of devices are available in SOIC-8 (D), VSSOP-8 with exposed pad (DGN) packages.

The UCC27524A device is a dual-channel, high-speed, low-side, gate-driver device capable of effectively driving MOSFET and IGBT power switches. The UCC27524A is a variant of the UCC2752x family. The UCC27524A adds the ability to handle –5 V directly at the input pins for increased robustness. The UCC27524A is a dual non-inverting driver. Using a design that inherently minimizes shoot-through current, the UCC27524A is capable of delivering high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay typically 13 ns. In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with a single input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

For safety purpose, internal pull-up and pull-down resistors on the input pins of the UCC27524A ensure that outputs are held LOW when input pins are in floating condition. UCC27524A features Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC27524A family of devices are available in SOIC-8 (D), VSSOP-8 with exposed pad (DGN) packages.
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Technical documentation

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Type Title Date
* Data sheet UCC27524A Dual 5-A, High-Speed, Low-Side Gate Driver With Negative Input Voltage Capability datasheet (Rev. B) PDF | HTML 16 Oct 2013
Technical article Managing power-supply noise with a 30-V gate driver 07 Dec 2021
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Application note Improving Efficiency of DC-DC Conversion through Layout 07 May 2019
Application note How to overcome negative voltage transients on low-side gate drivers' inputs 18 Jan 2019
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
EVM User's guide Using the UCC27714EVM-551 (Rev. A) 14 Sep 2015
White paper Advancing Power Supply Solutions Through the Promise of GaN 24 Feb 2015
More literature Design Review of a Full-Featured 350-W Offline Power Converter 29 Oct 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC27423-4-5-Q1EVM — UCC2742xQ1 Dual 4-A High-Speed Low-Side MOSFET Drivers With Enable Evaluation Module (EVM)

The UCC2742xQ1 EVM is a high-speed dual MOSFET evaluation module that provides a test platform for a quick and easy startup of the UCC2742xQ1 driver. Powered by a single 4V to 15V external supply, and featuring a comprehensive set of test points and jumpers. All of the devices have separate input (...)
User guide: PDF
Not available on TI.com
Evaluation board

UCC27714EVM-551 — UCC27714 600W Phase Shifted Full Bridge Converter Evaluation Module

This 600W EVM was designed to demonstrate how the UCC28950 control IC, UCC27524A and UCC27714 gate drivers could be used in a phase shifted full bridge converter that achieves ZVS from 50 to 100% load. 

User guide: PDF
Not available on TI.com
Simulation model

UCC27524 PSpice Transient Model

SLUM243.ZIP (28 KB) - PSpice Model
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Simulation model

UCC27524 TINA-TI Transient Spice Model

SLUM256.ZIP (8 KB) - TINA-TI Spice Model
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Simulation model

UCC27524 TINA-TI Transient Reference Design

SLUM257.TSC (89 KB) - TINA-TI Reference Design
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Calculation tool

UCC2752X Schematic Review Template

SLURB22.ZIP (110 KB)
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Calculation tool

UCC27524A Schematic Review Template

SLURB23.ZIP (110 KB)
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Reference designs

TIDM-1001 — Two Phase Interleaved LLC Resonant Converter Reference Design Using C2000™ MCUs

Resonant converters are popular DC-DC converters frequently used in server, telecom, automotive, industrial and other power supply applications. Their high performance (efficiency, power density, etc.), improving requirements of the various industry standards, and the ever increasing power density (...)
Schematic: PDF
Reference designs

TIDA-01367 — Cavium CN99xx Thunder X2 CPU PMBus VDD/VDD SRAM core power design

The TIDA-01367 reference design uses the TPS53679 multiphase controller and CSD95490Q5MC Smart Power Stages to implement a high-performance design suitable for powering Cavium ThunderX2® ARM Processors.

The dual outputs of the controller target a 240-A, 0.8-V core rail with a six-phase design and a (...)

Schematic: PDF
Reference designs

TIDA-01512 — PMBus Voltage Regulator Reference Design for NXP QorIQ LS2085A/88A Processors

TIDA-01512 uses the TPS53681 multiphase controller and CSD95490Q5MC Smart Power Stages to implement a high-performance design suitable for powering NXP QorIQ Communications Processors.

The dual outputs of the controller target the 60-ATDC, 1.0-V core rail with a four-phase design and a 30-ATDC, (...)

Schematic: PDF
Package Pins Download
HVSSOP (DGN) 8 View options
SOIC (D) 8 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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