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AM3352

AKTIV

Sitara-Prozessor: Arm Cortex-A8, 1Gb Ethernet, Display, CAN

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AM3352

AKTIV
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Produktdetails

CPU 1 Arm Cortex-A8 Frequency (MHz) 300, 600, 800, 1000 Display type 1 LCD Protocols Ethernet Hardware accelerators Security Accelerator Features General purpose Operating system Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit Rating Catalog Power supply solution TPS65216, TPS65218D0 Operating temperature range (°C) -40 to 125
CPU 1 Arm Cortex-A8 Frequency (MHz) 300, 600, 800, 1000 Display type 1 LCD Protocols Ethernet Hardware accelerators Security Accelerator Features General purpose Operating system Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit Rating Catalog Power supply solution TPS65216, TPS65218D0 Operating temperature range (°C) -40 to 125
NFBGA (ZCZ) 324 225 mm² (15 mm × 15 mm) NFBGA (ZCE) 298 169 mm² (13 mm × 13 mm)
  • Up to 1-GHz Sitara™ ARM® Cortex®-A8 32‑Bit RISC Processor
    • NEON™ SIMD Coprocessor
    • 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity)
    • 256KB of L2 Cache With Error Correcting Code (ECC)
    • 176KB of On-Chip Boot ROM
    • 64KB of Dedicated RAM
    • Emulation and Debug - JTAG
    • Interrupt Controller (up to 128 Interrupt Requests)
  • On-Chip Memory (Shared L3 RAM)
    • 64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
    • Accessible to All Masters
    • Supports Retention for Fast Wakeup
  • External Memory Interfaces (EMIF)
    • mDDR(LPDDR), DDR2, DDR3, DDR3L Controller:
      • mDDR: 200-MHz Clock (400-MHz Data Rate)
      • DDR2: 266-MHz Clock (532-MHz Data Rate)
      • DDR3: 400-MHz Clock (800-MHz Data Rate)
      • DDR3L: 400-MHz Clock (800-MHz Data Rate)
      • 16-Bit Data Bus
      • 1GB of Total Addressable Space
      • Supports One x16 or Two x8 Memory Device Configurations
    • General-Purpose Memory Controller (GPMC)
      • Flexible 8-Bit and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM)
      • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
      • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used in Conjunction With the GPMC to Locate Addresses of Data Errors from Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit per 512-Byte Block Error Location Based on BCH Algorithms
  • Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
    • Supports Protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, and More
    • Two Programmable Real-Time Units (PRUs)
      • 32-Bit Load/Store RISC Processor Capable of Running at 200 MHz
      • 8KB of Instruction RAM With Single-Error Detection (Parity)
      • 8KB of Data RAM With Single-Error Detection (Parity)
      • Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
      • Enhanced GPIO Module Provides Shift-In/Out Support and Parallel Latch on External Signal
    • 12KB of Shared RAM With Single-Error Detection (Parity)
    • Three 120-Byte Register Banks Accessible by Each PRU
    • Interrupt Controller (INTC) for Handling System Input Events
    • Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
    • Peripherals Inside the PRU-ICSS:
      • One UART Port With Flow Control Pins, Supports up to 12 Mbps
      • One Enhanced Capture (eCAP) Module
      • Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
      • One MDIO Port
  • Power, Reset, and Clock Management (PRCM) Module
    • Controls the Entry and Exit of Stand-By and Deep-Sleep Modes
    • Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
    • Clocks
      • Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate a Reference Clock for Various System and Peripheral Clocks
      • Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
      • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB and Peripherals [MMC and SD, UART, SPI, I2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock)
    • Power
      • Two Nonswitchable Power Domains (Real-Time Clock [RTC], Wake-Up Logic [WAKEUP])
      • Three Switchable Power Domains (MPU Subsystem [MPU], SGX530 [GFX], Peripherals and Infrastructure [PER])
      • Implements SmartReflex™ Class 2B for Core Voltage Scaling Based On Die Temperature, Process Variation, and Performance (Adaptive Voltage Scaling [AVS])
      • Dynamic Voltage Frequency Scaling (DVFS)
  • Real-Time Clock (RTC)
    • Real-Time Date (Day-Month-Year-Day of Week) and Time (Hours-Minutes-Seconds) Information
    • Internal 32.768-kHz Oscillator, RTC Logic and 1.1-V Internal LDO
    • Independent Power-on-Reset (RTC_PWRONRSTn) Input
    • Dedicated Input Pin (EXT_WAKEUP) for External Wake Events
    • Programmable Alarm Can be Used to Generate Internal Interrupts to the PRCM (for Wakeup) or Cortex-A8 (for Event Notification)
    • Programmable Alarm Can be Used With External Output (PMIC_POWER_EN) to Enable the Power Management IC to Restore Non-RTC Power Domains
  • Peripherals
    • Up to Two USB 2.0 High-Speed DRD (Dual-Role Device) Ports With Integrated PHY
    • Up to Two Industrial Gigabit Ethernet MACs (10, 100, 1000 Mbps)
      • Integrated Switch
      • Each MAC Supports MII, RMII, RGMII, and MDIO Interfaces
      • Ethernet MACs and Switch Can Operate Independent of Other Functions
      • IEEE 1588v1 Precision Time Protocol (PTP)
    • Up to Two Controller-Area Network (CAN) Ports
      • Supports CAN Version 2 Parts A and B
    • Up to Two Multichannel Audio Serial Ports (McASPs)
      • Transmit and Receive Clocks up to 50 MHz
      • Up to Four Serial Data Pins per McASP Port With Independent TX and RX Clocks
      • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
      • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
      • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Up to Six UARTs
      • All UARTs Support IrDA and CIR Modes
      • All UARTs Support RTS and CTS Flow Control
      • UART1 Supports Full Modem Control
    • Up to Two Master and Slave McSPI Serial Interfaces
      • Up to Two Chip Selects
      • Up to 48 MHz
    • Up to Three MMC, SD, SDIO Ports
      • 1-, 4- and 8-Bit MMC, SD, SDIO Modes
      • MMCSD0 has Dedicated Power Rail for 1.8‑V or 3.3-V Operation
      • Up to 48-MHz Data Transfer Rate
      • Supports Card Detect and Write Protect
      • Complies With MMC4.3, SD, SDIO 2.0 Specifications
    • Up to Three I2C Master and Slave Interfaces
      • Standard Mode (up to 100 kHz)
      • Fast Mode (up to 400 kHz)
    • Up to Four Banks of General-Purpose I/O (GPIO) Pins
      • 32 GPIO Pins per Bank (Multiplexed With Other Functional Pins)
      • GPIO Pins Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
    • Up to Three External DMA Event Inputs that can Also be Used as Interrupt Inputs
    • Eight 32-Bit General-Purpose Timers
      • DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
      • DMTIMER4–DMTIMER7 are Pinned Out
    • One Watchdog Timer
    • SGX530 3D Graphics Engine
      • Tile-Based Architecture Delivering up to 20 Million Polygons per Second
      • Universal Scalable Shader Engine (USSE) is a Multithreaded Engine Incorporating Pixel and Vertex Shader Functionality
      • Advanced Shader Feature Set in Excess of Microsoft VS3.0, PS3.0, and OGL2.0
      • Industry Standard API Support of Direct3D Mobile, OGL-ES 1.1 and 2.0, and OpenMax
      • Fine-Grained Task Switching, Load Balancing, and Power Management
      • Advanced Geometry DMA-Driven Operation for Minimum CPU Interaction
      • Programmable High-Quality Image Anti-Aliasing
      • Fully Virtualized Memory Addressing for OS Operation in a Unified Memory Architecture
    • LCD Controller
      • Up to 24-Bit Data Output; 8 Bits per Pixel (RGB)
      • Resolution up to 2048 × 2048 (With Maximum 126-MHz Pixel Clock)
      • Integrated LCD Interface Display Driver (LIDD) Controller
      • Integrated Raster Controller
      • Integrated DMA Engine to Pull Data from the External Frame Buffer Without Burdening the Processor via Interrupts or a Firmware Timer
      • 512-Word Deep Internal FIFO
      • Supported Display Types:
        • Character Displays - Uses LIDD Controller to Program these Displays
        • Passive Matrix LCD Displays - Uses LCD Raster Display Controller to Provide Timing and Data for Constant Graphics Refresh to a Passive Display
        • Active Matrix LCD Displays - Uses External Frame Buffer Space and the Internal DMA Engine to Drive Streaming Data to the Panel
    • 12-Bit Successive Approximation Register (SAR) ADC
      • 200K Samples per Second
      • Input can be Selected from any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
      • Can be Configured to Operate as a 4-Wire, 5-Wire, or 8-Wire Resistive Touch Screen Controller (TSC) Interface
    • Up to Three 32-Bit eCAP Modules
      • Configurable as Three Capture Inputs or Three Auxiliary PWM Outputs
    • Up to Three Enhanced High-Resolution PWM Modules (eHRPWMs)
      • Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
      • Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
    • Up to Three 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Device Identification
    • Contains Electrical Fuse Farm (FuseFarm) of Which Some Bits are Factory Programmable
      • Production ID
      • Device Part Number (Unique JTAG ID)
      • Device Revision (Readable by Host ARM)
  • Debug Interface Support
    • JTAG and cJTAG for ARM (Cortex-A8 and PRCM), PRU-ICSS Debug
    • Supports Device Boundary Scan
    • Supports IEEE 1500
  • DMA
    • On-Chip Enhanced DMA Controller (EDMA) has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels. EDMA is Used for:
      • Transfers to and from On-Chip Memories
      • Transfers to and from External Storage (EMIF, GPMC, Slave Peripherals)
  • Inter-Processor Communication (IPC)
    • Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between Cortex-A8, PRCM, and PRU-ICSS
      • Mailbox Registers that Generate Interrupts
        • Four Initiators (Cortex-A8, PRCM, PRU0, PRU1)
      • Spinlock has 128 Software-Assigned Lock Registers
  • Security
    • Crypto Hardware Accelerators (AES, SHA, RNG)
    • Secure Boot (optional; requires custom part engagement with TI)
  • Boot Modes
    • Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
  • Packages:
    • 298-Pin S-PBGA-N298 Via Channel Package
      (ZCE Suffix), 0.65-mm Ball Pitch
    • 324-Pin S-PBGA-N324 Package
      (ZCZ Suffix), 0.80-mm Ball Pitch
  • Up to 1-GHz Sitara™ ARM® Cortex®-A8 32‑Bit RISC Processor
    • NEON™ SIMD Coprocessor
    • 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity)
    • 256KB of L2 Cache With Error Correcting Code (ECC)
    • 176KB of On-Chip Boot ROM
    • 64KB of Dedicated RAM
    • Emulation and Debug - JTAG
    • Interrupt Controller (up to 128 Interrupt Requests)
  • On-Chip Memory (Shared L3 RAM)
    • 64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
    • Accessible to All Masters
    • Supports Retention for Fast Wakeup
  • External Memory Interfaces (EMIF)
    • mDDR(LPDDR), DDR2, DDR3, DDR3L Controller:
      • mDDR: 200-MHz Clock (400-MHz Data Rate)
      • DDR2: 266-MHz Clock (532-MHz Data Rate)
      • DDR3: 400-MHz Clock (800-MHz Data Rate)
      • DDR3L: 400-MHz Clock (800-MHz Data Rate)
      • 16-Bit Data Bus
      • 1GB of Total Addressable Space
      • Supports One x16 or Two x8 Memory Device Configurations
    • General-Purpose Memory Controller (GPMC)
      • Flexible 8-Bit and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM)
      • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
      • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used in Conjunction With the GPMC to Locate Addresses of Data Errors from Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit per 512-Byte Block Error Location Based on BCH Algorithms
  • Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
    • Supports Protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, and More
    • Two Programmable Real-Time Units (PRUs)
      • 32-Bit Load/Store RISC Processor Capable of Running at 200 MHz
      • 8KB of Instruction RAM With Single-Error Detection (Parity)
      • 8KB of Data RAM With Single-Error Detection (Parity)
      • Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
      • Enhanced GPIO Module Provides Shift-In/Out Support and Parallel Latch on External Signal
    • 12KB of Shared RAM With Single-Error Detection (Parity)
    • Three 120-Byte Register Banks Accessible by Each PRU
    • Interrupt Controller (INTC) for Handling System Input Events
    • Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
    • Peripherals Inside the PRU-ICSS:
      • One UART Port With Flow Control Pins, Supports up to 12 Mbps
      • One Enhanced Capture (eCAP) Module
      • Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
      • One MDIO Port
  • Power, Reset, and Clock Management (PRCM) Module
    • Controls the Entry and Exit of Stand-By and Deep-Sleep Modes
    • Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
    • Clocks
      • Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate a Reference Clock for Various System and Peripheral Clocks
      • Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
      • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB and Peripherals [MMC and SD, UART, SPI, I2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock)
    • Power
      • Two Nonswitchable Power Domains (Real-Time Clock [RTC], Wake-Up Logic [WAKEUP])
      • Three Switchable Power Domains (MPU Subsystem [MPU], SGX530 [GFX], Peripherals and Infrastructure [PER])
      • Implements SmartReflex™ Class 2B for Core Voltage Scaling Based On Die Temperature, Process Variation, and Performance (Adaptive Voltage Scaling [AVS])
      • Dynamic Voltage Frequency Scaling (DVFS)
  • Real-Time Clock (RTC)
    • Real-Time Date (Day-Month-Year-Day of Week) and Time (Hours-Minutes-Seconds) Information
    • Internal 32.768-kHz Oscillator, RTC Logic and 1.1-V Internal LDO
    • Independent Power-on-Reset (RTC_PWRONRSTn) Input
    • Dedicated Input Pin (EXT_WAKEUP) for External Wake Events
    • Programmable Alarm Can be Used to Generate Internal Interrupts to the PRCM (for Wakeup) or Cortex-A8 (for Event Notification)
    • Programmable Alarm Can be Used With External Output (PMIC_POWER_EN) to Enable the Power Management IC to Restore Non-RTC Power Domains
  • Peripherals
    • Up to Two USB 2.0 High-Speed DRD (Dual-Role Device) Ports With Integrated PHY
    • Up to Two Industrial Gigabit Ethernet MACs (10, 100, 1000 Mbps)
      • Integrated Switch
      • Each MAC Supports MII, RMII, RGMII, and MDIO Interfaces
      • Ethernet MACs and Switch Can Operate Independent of Other Functions
      • IEEE 1588v1 Precision Time Protocol (PTP)
    • Up to Two Controller-Area Network (CAN) Ports
      • Supports CAN Version 2 Parts A and B
    • Up to Two Multichannel Audio Serial Ports (McASPs)
      • Transmit and Receive Clocks up to 50 MHz
      • Up to Four Serial Data Pins per McASP Port With Independent TX and RX Clocks
      • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
      • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
      • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Up to Six UARTs
      • All UARTs Support IrDA and CIR Modes
      • All UARTs Support RTS and CTS Flow Control
      • UART1 Supports Full Modem Control
    • Up to Two Master and Slave McSPI Serial Interfaces
      • Up to Two Chip Selects
      • Up to 48 MHz
    • Up to Three MMC, SD, SDIO Ports
      • 1-, 4- and 8-Bit MMC, SD, SDIO Modes
      • MMCSD0 has Dedicated Power Rail for 1.8‑V or 3.3-V Operation
      • Up to 48-MHz Data Transfer Rate
      • Supports Card Detect and Write Protect
      • Complies With MMC4.3, SD, SDIO 2.0 Specifications
    • Up to Three I2C Master and Slave Interfaces
      • Standard Mode (up to 100 kHz)
      • Fast Mode (up to 400 kHz)
    • Up to Four Banks of General-Purpose I/O (GPIO) Pins
      • 32 GPIO Pins per Bank (Multiplexed With Other Functional Pins)
      • GPIO Pins Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
    • Up to Three External DMA Event Inputs that can Also be Used as Interrupt Inputs
    • Eight 32-Bit General-Purpose Timers
      • DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
      • DMTIMER4–DMTIMER7 are Pinned Out
    • One Watchdog Timer
    • SGX530 3D Graphics Engine
      • Tile-Based Architecture Delivering up to 20 Million Polygons per Second
      • Universal Scalable Shader Engine (USSE) is a Multithreaded Engine Incorporating Pixel and Vertex Shader Functionality
      • Advanced Shader Feature Set in Excess of Microsoft VS3.0, PS3.0, and OGL2.0
      • Industry Standard API Support of Direct3D Mobile, OGL-ES 1.1 and 2.0, and OpenMax
      • Fine-Grained Task Switching, Load Balancing, and Power Management
      • Advanced Geometry DMA-Driven Operation for Minimum CPU Interaction
      • Programmable High-Quality Image Anti-Aliasing
      • Fully Virtualized Memory Addressing for OS Operation in a Unified Memory Architecture
    • LCD Controller
      • Up to 24-Bit Data Output; 8 Bits per Pixel (RGB)
      • Resolution up to 2048 × 2048 (With Maximum 126-MHz Pixel Clock)
      • Integrated LCD Interface Display Driver (LIDD) Controller
      • Integrated Raster Controller
      • Integrated DMA Engine to Pull Data from the External Frame Buffer Without Burdening the Processor via Interrupts or a Firmware Timer
      • 512-Word Deep Internal FIFO
      • Supported Display Types:
        • Character Displays - Uses LIDD Controller to Program these Displays
        • Passive Matrix LCD Displays - Uses LCD Raster Display Controller to Provide Timing and Data for Constant Graphics Refresh to a Passive Display
        • Active Matrix LCD Displays - Uses External Frame Buffer Space and the Internal DMA Engine to Drive Streaming Data to the Panel
    • 12-Bit Successive Approximation Register (SAR) ADC
      • 200K Samples per Second
      • Input can be Selected from any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
      • Can be Configured to Operate as a 4-Wire, 5-Wire, or 8-Wire Resistive Touch Screen Controller (TSC) Interface
    • Up to Three 32-Bit eCAP Modules
      • Configurable as Three Capture Inputs or Three Auxiliary PWM Outputs
    • Up to Three Enhanced High-Resolution PWM Modules (eHRPWMs)
      • Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
      • Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
    • Up to Three 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Device Identification
    • Contains Electrical Fuse Farm (FuseFarm) of Which Some Bits are Factory Programmable
      • Production ID
      • Device Part Number (Unique JTAG ID)
      • Device Revision (Readable by Host ARM)
  • Debug Interface Support
    • JTAG and cJTAG for ARM (Cortex-A8 and PRCM), PRU-ICSS Debug
    • Supports Device Boundary Scan
    • Supports IEEE 1500
  • DMA
    • On-Chip Enhanced DMA Controller (EDMA) has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels. EDMA is Used for:
      • Transfers to and from On-Chip Memories
      • Transfers to and from External Storage (EMIF, GPMC, Slave Peripherals)
  • Inter-Processor Communication (IPC)
    • Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between Cortex-A8, PRCM, and PRU-ICSS
      • Mailbox Registers that Generate Interrupts
        • Four Initiators (Cortex-A8, PRCM, PRU0, PRU1)
      • Spinlock has 128 Software-Assigned Lock Registers
  • Security
    • Crypto Hardware Accelerators (AES, SHA, RNG)
    • Secure Boot (optional; requires custom part engagement with TI)
  • Boot Modes
    • Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
  • Packages:
    • 298-Pin S-PBGA-N298 Via Channel Package
      (ZCE Suffix), 0.65-mm Ball Pitch
    • 324-Pin S-PBGA-N324 Package
      (ZCZ Suffix), 0.80-mm Ball Pitch

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux® and TI-RTOS are available free of charge from TI.

The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.

The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Processor SDK Linux® and TI-RTOS are available free of charge from TI.

The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:

The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.

The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.
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* Datenblatt AM335x Sitara™ Processors datasheet (Rev. L) PDF | HTML 15.11.2019
* Errata AM335x Sitara Processors Silicon Errata (Revs 2.1, 2.0, 1.0) (Rev. I) 03.01.2017
Anwendungshinweis Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 12.02.2026
Anwendungshinweis HSR/PRP Solutions on Sitara Processors for Grid Substation Communication (Rev. A) PDF | HTML 30.01.2026
Anwendungshinweis Enabling Matter on Sitara MPU (Rev. A) PDF | HTML 24.11.2025
Anwendungshinweis AM335x Power Estimation Tool (Rev. A) PDF | HTML 11.06.2025
Whitepaper Securing Arm-Based Application Processors (Rev. F) PDF | HTML 26.02.2025
Anwendungshinweis Basic Ethernet Interface Debug With Linux PDF | HTML 11.10.2024
Whitepaper Time Sensitive Networking for Industrial Automation (Rev. C) PDF | HTML 31.07.2023
Anwendungshinweis Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 24.05.2023
Anwendungshinweis High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24.02.2023
Anwendungshinweis PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 11.10.2022
Designleitfaden Discrete Power Solution for AM335x in 12mmx12mm Form-Factor Reference Design (Rev. A) PDF | HTML 09.11.2021
Anwendungshinweis nfBGA Packaging (Rev. C) PDF | HTML 17.05.2021
Anwendungshinweis Ethernet PHY Configuration Using MDIO for Industrial Applications (Rev. A) 07.05.2021
Weitere Dokumente From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16.12.2020
Technischer Artikel Selecting the right processor for your data concentrator design PDF | HTML 03.08.2020
Whitepaper EtherNet/IP on TI's Sitara AM335x Processors (Rev. D) 28.07.2020
E-book Ein Techniker-Leitfaden für Industrieroboter-Designs Download English Version 25.03.2020
Benutzerhandbuch Powering the AM335x, AM437x, and AM438x with TPS65218D0 (Rev. B) 27.02.2020
Anwendungshinweis AM335x Schematic Checklist (Rev. A) PDF | HTML 19.12.2019
Benutzerhandbuch AM335x and AMIC110 Sitara™ Processors Technical Reference Manual (Rev. Q) 13.12.2019
Anwendungshinweis AM335x EMIF Tools 20.09.2019
Anwendungshinweis AM335x PMIC Selection Guide (Rev. A) 19.09.2019
Anwendungshinweis Programmable Logic Controllers — Security Threats and Solutions PDF | HTML 13.09.2019
Product overview Sitara™ processors + WiLink™ 8 Wi-Fi® + Bluetooth® combo connectivity (Rev. A) 30.07.2019
Whitepaper Power optimization techniques for energy-efficient systems (Rev. A) 28.06.2019
Anwendungshinweis Calculating Useful Lifetimes of Embedded Processors (Rev. B) PDF | HTML 07.05.2019
Anwendungshinweis AM335x Hardware Design Guide PDF | HTML 03.05.2019
Anwendungshinweis How to Port WOLFSSL Onto TI Sitara AM335 Starter Kit PDF | HTML 24.04.2019
Benutzerhandbuch Powering AMIC110, AMIC120, AM335x, and AM437x with TPS65216 PDF | HTML 11.04.2019
Anwendungshinweis Common EOS pitfalls in board design PDF | HTML 13.02.2019
Anwendungshinweis PRU-ICSS Getting Started Guide on TI-RTOS (Rev. A) 18.01.2019
Anwendungshinweis McASP Design Guide - Tips, Tricks, and Practical Examples 10.01.2019
Anwendungshinweis PRU Read Latencies (Rev. A) 21.12.2018
Anwendungshinweis PRU-ICSS Getting Starting Guide on Linux (Rev. A) PDF | HTML 10.12.2018
Anwendungshinweis PRU-ICSS EtherCAT Slave Troubleshooting Guide 07.11.2018
Anwendungshinweis PRU-ICSS / PRU_ICSSG Migration Guide PDF | HTML 05.11.2018
Whitepaper Secure Boot on embedded Sitara™ processors (Rev. A) 13.10.2018
Benutzerhandbuch How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 24.09.2018
Anwendungshinweis Processor SDK RTOS Customization: Modifying Board library to change UART instanc (Rev. A) 28.03.2018
Benutzerhandbuch Powering the AM335x With the TPS650250 (Rev. B) 14.03.2018
Whitepaper Data concentrators: The core of energy and data management (Rev. A) 21.02.2018
Benutzerhandbuch PRU Assembly Instruction User Guide 16.02.2018
Whitepaper POWERLINK on TI Sitara Processors (Rev. A) 10.01.2018
Whitepaper Achieving increased functionality and efficiency in vacuum robots 21.12.2017
Product overview TI Sitara™ AM335x ARM® Cortex™-A8 Microprocessors (Rev. E) 19.12.2017
Benutzerhandbuch TPS65910Ax User's Guide for AM335x Processors (Rev. F) 08.12.2017
Technischer Artikel Introduction to EV charging displays PDF | HTML 15.11.2017
Benutzerhandbuch Sub-1 GHz Sensor-to-Cloud Linux® E14 Kit 16.10.2017
Anwendungshinweis Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14.08.2017
Anwendungshinweis Processor-SDK RTOS Power Management and Measurement 02.08.2017
Whitepaper Cities grow smarter through innovative semiconductor technologies 07.07.2017
Anwendungshinweis Sitara Linux ALSA DSP Microphone Array Voice Recognition 30.06.2017
Anwendungshinweis AM335x Reliability Considerations in PLC Applications (Rev. A) 27.04.2017
Anwendungshinweis AM335x Low Power Design Guide (Rev. A) 28.02.2017
Whitepaper Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 11.08.2016
Whitepaper Building automation for enhanced energy and operational efficiency (Rev. A) 26.10.2015
Anwendungshinweis Plastic Ball Grid Array [PBGA] Application Note (Rev. B) 13.08.2015
Whitepaper Profibus on AM335x and AM1810 Sitara ARM Microprocessor White Paper (Rev. B) 03.03.2015
Benutzerhandbuch G3 Power Line Communication Data Concentrator on BeagleBone Black Design Guide 13.11.2014
Benutzerhandbuch Powering the AM335x with the TPS65217x . (Rev. I) 06.09.2014
Whitepaper Mainline Linux™ ensures stability and innovation 27.03.2014
Whitepaper Linaro Speeds Development in TI Linux SDKs PDF | HTML 27.08.2013
Whitepaper The Yocto Project:Changing the way embedded Linux software solutions are develop 14.03.2013
Whitepaper Smart thermostats are a cool addition to the connected home 27.09.2012

Design und Entwicklung

Lösungen für die Stromversorgung

Verfügbare Lösungen für die Stromversorgung für den AM3352 finden. TI bietet Stromversorgungslösungen für Ein-Chip-Systeme (SoCs), Prozessoren, Mikrocontroller, Sensoren und feldprogrammierbare Gate-Arrays (FPGAs) von TI und von Fremdherstellern an.

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Evaluierungsplatine

TMDXEVM3358 — AM335x-Evaluierungsmodul

The AM335x Evaluation Module (EVM) enables developers to immediately start evaluating the AM335x processor family (AM3351, AM3352, AM3354, AM3356, AM3358) and begin building applications for factory automation, building automation, grid infrastructure, and more.

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TPS65217CEVM — TPS65217C-Evaluierungsmodul

The TPS65217CEVM is a fully assembled platform for evaluating the performance of the TPS65217C power management device.

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TPS65218EVM-100 — TPS65218-Evaluierungsmodul

The TPS65218EVM is a fully assembled platform for evaluating the performance of the TPS65218 power management device.

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ADVAN-3P-SITARA-SOMS — Advantech Sitara-SOMs und SBCs

Advantech offers Sitara™ based embedded core computing solutions including computer-on-modules, single-board-computers and box computers. Their compact, low-power-consumption, and cost-effective Arm®-based platform solutions are designed to deliver easier system integration, better (...)
Von: Advantech
Unterstützte Produkte und Hardware
Evaluierungsplatine

BEAGL-BONE-GRN-ECO — Seeed Studio BeagleBone® Green Eco-Evaluierungsmodul

Seeed Studio BeagleBone® Green Eco ist eine kostengünstige, Open-Source-Hardware-Entwicklungsplattform in Industriequalität, die auf dem Arm®-Cortex®-A8-Prozessor AM335x basiert. Das Design mit vier Schichten beinhaltet hochwertige Komponenten, die einen größeren Temperaturbereich, eine (...)
Benutzerhandbuch: PDF | HTML
Von: Seeed Technology Co., Ltd.
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BYTES-3P-SITARASOMS — Bytes at Work Sitara-SOMs

bytes at work develops industrial computing products and services. They offer SOMs based on Sitara Arm® processors.

Learn more about bytes at work at http://www.bytesatwork.io/en. 


Von: bytes at work AG
Unterstützte Produkte und Hardware
Evaluierungsplatine

COMPU-3P-SITARASOMS — Compulab Sitara-SOMs

CompuLab is a leading manufacturer of computer-on-module boards and miniature PC systems. CompuLab's products excel with an advanced set of features, outstanding level of integration, high reliability and affordable prices. Annual manufacturing rate of over 100,000 boards and systems positions (...)
Von: CompuLab
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Evaluierungsplatine

CRLNK-3P-SOMS — Critical Link system on modules for TI ARM-based Processors

Critical Link is a US-based embedded systems company offering System on Modules (SoMs) and scientific imaging platforms for electronic applications around the world. The MitySOM® and MityDSP® families incorporate DSP, FPGA, and ARM technologies, and are designed for long product lifespan and (...)

Von: Critical Link LLC
Unterstützte Produkte und Hardware
Evaluierungsplatine

FORLX-3P-SITARA-SOMS — Forlinx Sitara-SOMs

As a member unit of CSIA (China Software Industry Association) Embedded System Branch, Forlinx Embedded Tech Co., Ltd. has the capability to design, prototype and manufacture printed circuit boards, sub-assemblies and complete electronic products. Forlinx is committed to the development of Sitara (...)
Von: Forlinx Embedded Tech. Co., Ltd
Unterstützte Produkte und Hardware
Evaluierungsplatine

MYIR-3P-SITARASOMS — MYIR Sitara-SOMs

MYIR offers a series of development kits and system-on-modules based on TI's AM335x Arm® Cortex®-A8 processors to meet customers' different requirements. MYIR also offers a compact single board computer Rico board based on TI's newest AM437x Arm Cortex-A9 solution. MYIR also offers custom (...)
Von: MYIR Tech Limited
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Evaluierungsplatine

OCTVO-3P-AM335X — System-in-Package auf Basis von Octavo Systems AM335x

Octavo Systems ist führend in der Bereitstellung von System-in-Package (SiP)-basierten Lösungen für Innovatoren auf der ganzen Welt. Die SiP-Bausteinfamilie OSD335x bietet die schnellste und kostengünstigste Möglichkeit, hochleistungsfähige Embedded-Systeme auf Basis des Sitara™ AM335x Arm® (...)

Von: Octavo Systems
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Evaluierungsplatine

PHYTC-3P-PHYBOARD-AM335X — PHYTEC® phyBOARD®-AM335x Entwicklungskit für AM335x Arm®-basierte Sitara™ -Prozessoren

Das phyBOARD®-AM335x verfügt über ein phyCORE-AM335x System-on-Module (SOM), das auf dem Sitara™-Programm von TI basiert; AM335x, das direkt auf eine Trägerplatine gelötet wird. Dieser „Direct Solder Connect“ (DSC) der SOM-zu-Carrier-Platine reduziert die Systemkosten durch den Wegfall von (...)

Von: PHYTEC
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Evaluierungsplatine

TQ-3P-SITARASOMS — Sitara-SOMs der TQ-Gruppe

TQ offers the complete range of services from development, through production and service right up to product life cycle management. The services cover assemblies, equipment and systems including hardware, software and mechanics. Customers can obtain all services from TQ on a modular basis as (...)
Von: TQ-Group
Unterstützte Produkte und Hardware
Evaluierungsplatine

VANWS-3P-VGATEWAY — vGATEWAY reference design from Vanteon Wireless Solutions based on AM335x

Vanteon Gateway™ is a modular bridging platform designed to translate between common wireless interfaces and protocols for Internet of Things (IoT) applications. The Gateway™ platform utilizes the AM335x Sitara ARM-Cortex A8 processor and includes many standard wired and wireless communication (...)

Von: Vanteon Wireless Solutions
Unterstützte Produkte und Hardware
Evaluierungsplatine

VAR-3P-SITARASOMS — Variscite Sitara-SOMs

Variscite designs and produces a variety of system on modules and single board computers based TI's Sitara™, OMAP™ and DaVinci™ processors, covering a wide range of products, segments and markets. Variscite provides its customers with a complete development kit supporting Windows (...)
Von: Variscite
Unterstützte Produkte und Hardware
Tochterkarte

WL1835MODCOM8B — WiLink™ 8 Modul, 2,4 GHz, WiFi® + Bluetooth® COM8 – Evaluierungsmodul

TI WiLink™ 8 module family

The WL1835MODCOM8 is one of the two evaluation boards for the TI WiLink 8 combo module family. For designs requiring performance in the 5 GHz band and extended temperature range, see the WL1837MODCOM8I.

The WL1835MODCOM8 Kit for Sitara EVMs easily enables customers to add (...)

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Tochterkarte

WL1837MODCOM8I — WiLink™ 8-Evaluierungsmodul mit Dualbandunterstützung (2,4 und 5 GHz) für Wi-Fi® und Bluetooth® COM8

TI WiLink™ 8 module family The WL1837MODCOM8I is one of the two evaluation boards for the TI WiLink™ 8 combo module family. For designs requiring performance in the 2.4 GHz band only, see the WL1835MODCOM8.

The WL1837MODCOM8I, which is compatible with many processors including TI’s (...)

Benutzerhandbuch: PDF | HTML
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Debug-Tastkopf

TMDSEMU200-U — XDS200-USB-Debug-Tastkopf

Der XDS200 ist ein Debug-Tastkopf (Emulator) zum Debugging von Embedded-Bausteinen von TI. Für die meisten Bausteine wird die Verwendung der neueren, kostengünstigeren XDS110 (www.ti.com/tool/TMDSEMU110-U) empfohlen. Der XDS200 unterstützt eine große Zahl von Standards (IEEE1149.1, IEEE1149.7, SWD) (...)

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Debug-Tastkopf

TMDSEMU560V2STM-U — XDS560™-Software v2 – System-Trace-USB-Debug-Sonde

XDS560v2 ist die Debug-Sonde mit der höchsten Leistung der XDS560™-Produktfamilie und unterstützt sowohl den herkömmlichen JTAG-Standard (IEEE1149.1) als auch cJTAG (IEEE1149.7).  Beachten Sie, dass das Serial Wire Debugging (SWD) nicht unterstützt wird.

Alle XDS-Debug-Sonden unterstützen Core- und (...)

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Debug-Tastkopf

TMDSEMU560V2STM-UE — XDS560v2 System-Trace-USB-und Ethernet-Debug-Tastkopf

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

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Debug-Tastkopf

LB-3P-TRACE32-ARM — Debug- und Trace-System Lauterbach TRACE32® für Arm®-basierte Mikrocontroller und Prozessoren

Die TRACE32®-Tools von Lauterbach sind eine Suite hochmoderner Hardware- und Softwarekomponenten, mit denen Entwickler alle Arten von Arm®-basierten Mikrocontrollern und Prozessoren analysieren, optimieren und zertifizieren können. Die weltweit anerkannten Debugging- und Trace-Lösungen für (...)

Von: Lauterbach GmbH
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Software-Entwicklungskit (SDK)

PROCESSOR-SDK-LINUX-AM335X — Linux Processor SDK for AM335x

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Unterstützte Produkte und Hardware
Software-Entwicklungskit (SDK)

PROCESSOR-SDK-LINUX-RT-AM335X — Linux-RT Processor SDK for AM335x

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Unterstützte Produkte und Hardware
Software-Entwicklungskit (SDK)

PROCESSOR-SDK-RTOS-AM335X — TI-RTOS Processor SDK for AM335x and AMIC110 devices (No design support from TI available. Refer to Overview- RTOS Highlights for details.)

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Unterstützte Produkte und Hardware
Software-Entwicklungskit (SDK)

TIBLUETOOTHSTACK-SDK — Dual-Mode Bluetooth®-Stack von TI

Der Dual-Mode-Bluetooth-Stack von TI ermöglicht Bluetooth + Bluetooth Low Energy und besteht aus Single-Mode- und Dual-Mode-Angeboten, welche die Bluetooth 4.0/4.1/4.2-Spezifikation implementieren. Der Bluetooth-Stack ist vollständig für Bluetooth Special Interest Group (SIG) qualifiziert, (...)

Unterstützte Produkte und Hardware
IDE, Konfiguration, Compiler oder Debugger

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

Unterstützte Produkte und Hardware
IDE, Konfiguration, Compiler oder Debugger

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

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Onlineschulungen

BOOTL-3P-TRAINING — Schulung zur Embedded-Softwareentwicklung für Arm-basierte Prozessoren von TI

Von: Bootlin
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Betriebssystem (BS)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Unterstützte Produkte und Hardware
Betriebssystem (BS)

MG-3P-NUCLEUS-RTOS — Mentor Grafik Nucleus RTOS

Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
Von: Mentor Graphics Corporation
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Betriebssystem (BS)

QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

Das QNX Neutrino® Realtime Operating System (RTOS) ist ein voll ausgestattetes und robustes RTOS, das die nächste Generation von Produkten für eingebettete Systeme in den Bereichen Automobilindustrie, Medizintechnik, Transport, Militär und Industrie ermöglicht. Das Mikrokernel-Design und die (...)
Von: QNX
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Treiber oder Bibliothek

WIND-3P-VXWORKS-LINUX-OS — Wind-River-Prozessoren VxWorks und Linux-Betriebssysteme

Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)

Von: Wind River Systems
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Treiber oder Bibliothek

WIT-3P-SITARABSP — Witekio Sitara Android- und Windows-Betriebssysteme

Witekio brings expertise on low (OS, driver, firmware) and high level software (application, connectivity, cloud) for TI's OMAP and Sitara AM335x, AM437x, and AM57x platforms. Witekio offers BSPs, drivers, application development/UI/custom drivers for Android, Linux and Windows embedded systems as (...)
Von: Witekio
Unterstützte Produkte und Hardware
Software-Programmiertool

SITARA-DDR-CONFIG-TOOL-AM335X — AM335x and AMIC110 EMIF Tools

Das Sitara™ EMIF-Tool ist ein Softwaretool, das eine Schnittstelle zur Konfiguration der TI-Prozessoren für den Zugriff auf die externen DDR-Speicherbausteine bereitstellt. Das Tool optimiert auch die Delay Locked Loop (DLL)-Einstellungen, um Versatz beim Platinenlayout zu kompensieren. Die (...)

Unterstützte Produkte und Hardware
Software-Programmiertool

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash ist Teil des umfassenden CCStudio™-Entwicklungsökosystem von TI und ein Softwaretool zur Programmierung des integrierten Flash-Speichers von TI-Mikrocontrollern und drahtlosen Kommunikationsbausteinen sowie des integrierten Flash-Speichers für TI-Prozessoren. UniFlash bietet sowohl (...)

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Simulationsmodell

AM335x Thermal Model

SPRM824.ZIP (10 KB) - Wärmemodell
Unterstützte Produkte und Hardware
Simulationsmodell

AM335x ZCE IBIS Model (Rev. B)

SPRM556B.ZIP (21124 KB) - IBIS-Modell
Unterstützte Produkte und Hardware
Simulationsmodell

AM335x ZCE Rev. 2.0 BSDL Model (Rev. A)

SPRM548A.ZIP (8 KB) - BSDL-Modell
Unterstützte Produkte und Hardware
Simulationsmodell

AM335x ZCE Rev. 2.1 BSDL Model

SPRM606.ZIP (8 KB) - BSDL-Modell
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Simulationsmodell

AM335x ZCZ IBIS Model (Rev. C)

SPRM552C.ZIP (21721 KB) - IBIS-Modell
Unterstützte Produkte und Hardware
Simulationsmodell

AM335x ZCZ Rev. 2.0 BSDL Model (Rev. A)

SPRM549A.ZIP (8 KB) - BSDL-Modell
Unterstützte Produkte und Hardware
Simulationsmodell

AM335x ZCZ Rev. 2.1 BSDL Model

SPRM607.ZIP (8 KB) - BSDL-Modell
Unterstützte Produkte und Hardware
Berechnungstool

AM335-PET-CALC — AM335x Power Estimation Tool

AM335x PET provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not guaranteed within a specified precision.
Unterstützte Produkte und Hardware
Berechnungstool

CLOCKTREETOOL — Taktbaum-Tool für Sitara, Automobilanwendungen, Sichtanalytik und digitale Signalprozessoren

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:

  • Visualize the device clock tree
  • Interact with clock tree (...)
Unterstützte Produkte und Hardware
Berechnungstool

SITARA-DDR-CONFIG-TOOL-AM65X-DRA80XM — AM65x/DRA80xM-EMIF-Tool-Spreadsheet

Das Sitara™ EMIF-Tool ist ein Softwaretool, das eine Schnittstelle zur Konfiguration der TI-Prozessoren für den Zugriff auf die externen DDR-Speicherbausteine bereitstellt. Das Tool optimiert auch die Delay Locked Loop (DLL)-Einstellungen, um Versatz beim Platinenlayout zu kompensieren. Die (...)

Unterstützte Produkte und Hardware
Referenzdesign

TIDEP-0087 — Mensch-Maschine-Schnittstelle (HMI) für EV-Ladeinfrastruktur – Referenzdesign

Dieses prozessorbasierte Referenzdesign ermöglicht eine schnellere Markteinführung und unterstützt Kunden bei der Entwicklung kosteneffizienter Mensch-Maschine-Schnittstele-(HMI)-Lösungen für Ladeinfrastruktur von Elektrofahrzeugen (EV) bzw. für EV-Ladeeinrichtungen (EVSE). Dieses Referenzdesign (...)

Unterstützte Produkte und Hardware
Referenzdesign

TIDEP-01005 — Referenzdesign für Mensch-Maschine-Schnittstelle (HMI) für intelligente Thermostate

Dieses prozessorbasierte Referenzdesign ermöglicht eine schnellere Markteinführung und hilft Kunden bei der Entwicklung kostengünstiger Mensch-Maschine-Schnittstellen (HMI)-Lösungen für intelligente Thermostate. Die Sitara™ AM335x-Prozessorfamilie bietet skalierbare Alternativen mit (...)

Unterstützte Produkte und Hardware
Referenzdesign

TIDEP-01013 — Referenzdesign für Gestengesteuerte HMI mit mmWave-Sensoren und Sitara™-Prozessoren

Dieses Referenzdesign präsentiert die natürliche Gesten- und Anwesenheitserkennung mit dem Prozessor-SDK Linux, das auf dem Sitara-AM335x-Prozessor ausgeführt wird, und dem mmWave-SDK, das auf dem IWR6843ISK ausgeführt wird.

Das Design demonstriert die Funktionalität einer gestengesteuerten HMI (...)

Unterstützte Produkte und Hardware
Referenzdesign

TIDEP-0102 — Mensch-Maschine-Schnittstelle (HMI) für Schutzrelais – Referenzdesign

Dieses prozessorbasierte Referenzdesign ermöglicht eine schnellere Markteinführung und hilft Kunden bei der Entwicklung kostengünstiger Mensch-Maschine-Schnittstellen (HMI)-Lösungen für Schutzrelais. Dieses Referenzdesign zeigt eine zweidimensionale (2D) grafische Qt-Benutzerschnittstelle (GUI), (...)

Unterstützte Produkte und Hardware
Referenzdesign

TIDEP0019 — IEC-61850-Demo eines Schaltanlagen-Controllers auf Beaglebone Cape und Starter Kit

Eine kostengünstige, vereinfachte Implementierung eines IEC 61850 Schaltanlagen-Controllers wird demonstriert, indem der Triangle MicroWorks IEC 61850 Stack effizient auf der TI AM335X Plattform mit einer Definition der Linux-Zielebene ausgeführt wird. Auf der AM335X-Plattform und der (...)

Unterstützte Produkte und Hardware
Referenzdesign

TIDEP0044 — Referenzdesign für Entwicklungsplattform für Solarwechselrichter-Gateway

Solar Inverter Gateways add communication functions to solar energy generation systems to enable system monitoring, real-time feedback, system updates, and more. The TIDEP0044 reference design describes the implementation of a solar inverter gateway using display, Ethernet, USB, and CAN on the (...)

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
NFBGA (ZCZ) 324 Ultra Librarian
NFBGA (ZCE) 298 Ultra Librarian
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