SN74ALVC08-EP

AKTIV

Ultra-Highspeed-UND-Gatter (3 ns), 4 Kanäle, 2 Eingänge, 1,65 V bis 3,6 V (Verbessertes Produkt)

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Datenblatt

document-pdfAcrobat SN74ALVC08-EP datasheet (Rev. A) (Englisch)

SN74ALVC08-EP

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Technology family

ALVC

Number of channels

4

Inputs per channel

2

IOL (max) (mA)

24

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

150

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-40 to 85

Technology family

ALVC

Number of channels

4

Inputs per channel

2

IOL (max) (mA)

24

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

150

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-40 to 85

SOIC (D)

14

51.9 mm² (8.65 mm × 6 mm)

Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Operates From 1.65 V to 3.6 V
Max t_pd of 2.9 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Latch-Up Performance Exceeds 250 mA Per JESD 17

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Operates From 1.65 V to 3.6 V
Max t_pd of 2.9 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Latch-Up Performance Exceeds 250 mA Per JESD 17

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74ALVC08 quadruple 2-input positive-AND gate is designed for 1.65-V to 3.6-V V_CC operation.

The device performs the Boolean function Y = A • B or Y (A\ + B\)\ in positive logic.

The SN74ALVC08 quadruple 2-input positive-AND gate is designed for 1.65-V to 3.6-V V_CC operation.

The device performs the Boolean function Y = A • B or Y (A\ + B\)\ in positive logic.

filter

Andere AND-Gatter suchen

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Format-Optionen	Neueste englische Version herunterladen	Datum
*	Datenblatt	SN74ALVC08-EP datasheet (Rev. A)			20.05.2004
*	VID	SN74ALVC08-EP VID V6204686			21.06.2016

Design und Entwicklung

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Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
SOIC (D)	14	Ultra Librarian

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SN74ALVC08-EP

Ultra-Highspeed-UND-Gatter (3 ns), 4 Kanäle, 2 Eingänge, 1,65 V bis 3,6 V (Verbessertes Produkt)

SN74ALVC08-EP

Produktdetails

Technische Dokumentation

Design und Entwicklung

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