Gehäuseinformationen
| Gehäuse | Pins SOIC (D) | 8 |
| Betriebstemperaturbereich (°C) -40 to 125 |
| Gehäusemenge | Träger 2.500 | LARGE T&R |
Merkmale von UCC27423-Q1
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
- Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C6
- Industry-Standard Pinout
- Enable Functions for Each Driver
- High-Current Drive Capability of ±4 A
- Unique Bipolar and CMOS True Drive Output Stage Provides High Current at MOSFET Miller Thresholds
- Inputs Independent of Supply Voltage Compatible With TTL and CMOS
- 20-ns Typical Rise and 15-ns Typical Fall Times With 1.8-nF Load
- Typical Propagation Delay Times of 25 ns With Input Falling and 35 ns With Input Rising
- 4-V to 15-V Supply Voltage
- Dual Outputs Can Be Paralleled for Higher Drive Current
- Available in Thermally Enhanced MSOP PowerPAD™ Package
- Rated From –40°C to +125°C
Beschreibung von UCC27423-Q1
The UCC2742x-Q1 family of devices are high-speed dual MOSFET drivers capable of delivering large peak currents into capacitive loads. Two standard logic options are offered: dual inverting and dual noninverting drivers. They are offered in the standard 8-pin SOIC (D) package. The thermally enhanced 8-pin PowerPAD Package MSOP package (DGN) drastically lowers the thermal resistance to improve long-term reliability.
Using a design that inherently minimizes shoot-through current, these drivers deliver 4-A current where it is needed most, at the Miller plateau region, during the MOSFET switching transition. A unique bipolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages.
The UCC2742x-Q1 provide enable (ENBL) functions to have better control of the operation of the driver applications. ENBA and ENBB are implemented on pins 1 and 8, which were previously left unused in the industry standard pinout. They are internally pulled up to V DD for active-high logic and can be left open for standard operation.