Inicio Interfaz Circuitos integrados LVDS, M-LVDS y PECL

SN55LVRA4-SEP

ACTIVO

Receptor del diferencial de alta velocidad de cuatro canales

Detalles del producto

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL Output signal LVTTL Rating Space Operating temperature range (°C) -55 to 125
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL Output signal LVTTL Rating Space Operating temperature range (°C) -55 to 125
SOIC (D) 16 59.4 mm² 9.9 x 6
  • VID V62/25606-01XE
  • Total ionizing dose characterized at 30krad (Si)
    • Total ionizing dose radiation lot acceptance testing (TID RLAT) for every wafer lot to 30krad (Si)
  • Single-event effects (SEE) characterized:
    • Single event latch-up (SEL) immune to linear energy transfer (LET) = 50MeV-cm2 /mg
    • Single event transient (SET) characterization report available
  • 400Mbps signaling rate
  • Operates with a single 3.3V supply
  • –4V to 5V extended common-mode input voltage range
  • Differential input thresholds < ±50mV with 50mV of hysteresis over entire common-mode input voltage range
  • Complies with TIA/EIA-644 (LVDS)
  • Active fail-safe assures a high-level output with no input and input remains high-impedance on power down
  • Bus-pin ESD protection exceeds 15kV HBM
  • TTL control inputs are 5V tolerant
  • Space enhanced plastic (SEP)
    • Controlled baseline
    • Gold wire, NiPdAu lead finish
    • One assembly and test site, one fabrication site
    • Extended product life cycle
    • Military (–55°C to 125°C) temperature range
    • Product traceability
    • Meets NASA ASTM E595 outgassing specification
  • VID V62/25606-01XE
  • Total ionizing dose characterized at 30krad (Si)
    • Total ionizing dose radiation lot acceptance testing (TID RLAT) for every wafer lot to 30krad (Si)
  • Single-event effects (SEE) characterized:
    • Single event latch-up (SEL) immune to linear energy transfer (LET) = 50MeV-cm2 /mg
    • Single event transient (SET) characterization report available
  • 400Mbps signaling rate
  • Operates with a single 3.3V supply
  • –4V to 5V extended common-mode input voltage range
  • Differential input thresholds < ±50mV with 50mV of hysteresis over entire common-mode input voltage range
  • Complies with TIA/EIA-644 (LVDS)
  • Active fail-safe assures a high-level output with no input and input remains high-impedance on power down
  • Bus-pin ESD protection exceeds 15kV HBM
  • TTL control inputs are 5V tolerant
  • Space enhanced plastic (SEP)
    • Controlled baseline
    • Gold wire, NiPdAu lead finish
    • One assembly and test site, one fabrication site
    • Extended product life cycle
    • Military (–55°C to 125°C) temperature range
    • Product traceability
    • Meets NASA ASTM E595 outgassing specification

The SN55LVRA4-SEP offers the widest common-mode input voltage range in the industry. These receivers provide an input voltage range specification compatible with a 5V PECL signal as well as an overall increased ground-noise tolerance.

The SN55LVRA4-SEP include a failsafe circuit that provides a high-level output within 60ns after loss of the input signal. The most common causes of signal loss are disconnected cables, shorted lines, or powered-down transmitters. The failsafe circuit prevents noise from being received as valid data under these fault conditions.

The intended application and signaling technique of these devices is point-to-point baseband data transmission over controlled impedance media of approximately 100Ω. The transmission media can be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN55LVRA4-SEP is characterized for operation from –55°C to 125°C.

The SN55LVRA4-SEP offers the widest common-mode input voltage range in the industry. These receivers provide an input voltage range specification compatible with a 5V PECL signal as well as an overall increased ground-noise tolerance.

The SN55LVRA4-SEP include a failsafe circuit that provides a high-level output within 60ns after loss of the input signal. The most common causes of signal loss are disconnected cables, shorted lines, or powered-down transmitters. The failsafe circuit prevents noise from being received as valid data under these fault conditions.

The intended application and signaling technique of these devices is point-to-point baseband data transmission over controlled impedance media of approximately 100Ω. The transmission media can be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN55LVRA4-SEP is characterized for operation from –55°C to 125°C.

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Documentación técnica

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* Data sheet SN55LVRA4-SEP Radiation Tolerant Quad Channel High-Speed Differential Receiver datasheet (Rev. A) PDF | HTML 05 dic 2025
* Radiation & reliability report SN55LVRA4-SEP Total Ionizing Dose (TID) Report 10 dic 2025
* Radiation & reliability report SN55LVRA4-SEP Single-Event Effects (SEE) Radiation Report PDF | HTML 08 dic 2025
* Radiation & reliability report SN55LVRA4-SEP Production Flow and Reliability Report PDF | HTML 12 nov 2025
Selection guide TI Space Products (Rev. K) 04 abr 2025

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

SN65LVDS31-33EVM — Módulo de evaluación para SN65LVDS31 y SN65LVDS33

TI offers a series of low-voltage differential signaling (LVDS) evaluation modules (EVMs) designed for analysis of the electrical characteristics of LVDS drivers and receivers. Four unique EVMs are available to evaluate the different classes of LVDS devices offered by TI.

As seen in the Combination (...)

Guía del usuario: PDF
Modelo de simulación

SN65LVDS33 IBIS Model (Rev. A)

SLLC069A.ZIP (6 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® para TI es un entorno de diseño y simulación que ayuda a evaluar la funcionalidad de los circuitos analógicos. Esta completa suite de diseño y simulación utiliza un motor de análisis analógico de Cadence®. Disponible sin ningún costo, PSpice para TI incluye una de las bibliotecas de modelos (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 16 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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