SN74AS756

ACTIVO

Inversores bipolares de 8 canales, de 4.5 V a 5.5 V con salidas de colector abiertas

Detalles del producto

Technology family AS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) 0 Supply current (max) (µA) 80000 Input type Bipolar Output type Open-collector Features Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) 0 to 70
Technology family AS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) 0 Supply current (max) (µA) 80000 Input type Bipolar Output type Open-collector Features Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Eliminate the Need for 3-State Overlap Protection
  • pnp Inputs Reduce dc Loading
  • Open-Collector Versions of ´AS240A and ´AS241
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

  • Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Eliminate the Need for 3-State Overlap Protection
  • pnp Inputs Reduce dc Loading
  • Open-Collector Versions of ´AS240A and ´AS241
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters by eliminating the need for 3-state overlap protection. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable () inputs, and complementary OE and inputs. These devices feature high fan-out and improved fan-in.

The SN54AS756 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS756 and SN74AS757 are characterized for operation from 0°C to 70°C.

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters by eliminating the need for 3-state overlap protection. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable () inputs, and complementary OE and inputs. These devices feature high fan-out and improved fan-in.

The SN54AS756 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS756 and SN74AS757 are characterized for operation from 0°C to 70°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Octal Buffers & Line Drivers With Open-Collector Outputs datasheet (Rev. B) 01 ene 1995
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Application note Designing With Logic (Rev. C) 01 jun 1997
Application note Advanced Schottky Load Management 01 feb 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Application note Advanced Schottky (ALS and AS) Logic Families 01 ago 1995

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML
Modelo de simulación

SN74AS756 Behavioral SPICE Model

SDAM037.ZIP (7 KB) - PSpice Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
PDIP (N) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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