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TMS320F28P551SG

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MCU C2000™ de 32 bits con flash de 512 kB a 160 MHz C28x + CLA, cinco ADC, CLB, AES y SDFM

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TMS320F28P551SG

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Detalles del producto

CPU 1 C28, 1 CLA Frequency (MHz) 160 Flash memory (kByte) 512 RAM (kByte) 101 ADC type 5 12-bit SAR Total processing (MIPS) 300, 320 Features AES encryption, Configurable logic block, FPU32, InstaSPIN-FOC technology, Robotics UART 3 CAN (#) 1 PWM (Ch) 24 Security Secure storage TI functional safety category Functional Safety-Compliant Number of ADC channels 12, 18, 26, 28, 35 Direct memory access (Ch) 6 SPI 2 QEP 3 Hardware accelerators Control law accelerator, Trigonometric math accelerator Edge AI enabled Edge AI Studio enabled Operating temperature range (°C) to Rating Catalog Communication interface CAN, FSI, I2C, LIN, PMBUS, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 512 Number of I2Cs 2
CPU 1 C28, 1 CLA Frequency (MHz) 160 Flash memory (kByte) 512 RAM (kByte) 101 ADC type 5 12-bit SAR Total processing (MIPS) 300, 320 Features AES encryption, Configurable logic block, FPU32, InstaSPIN-FOC technology, Robotics UART 3 CAN (#) 1 PWM (Ch) 24 Security Secure storage TI functional safety category Functional Safety-Compliant Number of ADC channels 12, 18, 26, 28, 35 Direct memory access (Ch) 6 SPI 2 QEP 3 Hardware accelerators Control law accelerator, Trigonometric math accelerator Edge AI enabled Edge AI Studio enabled Operating temperature range (°C) to Rating Catalog Communication interface CAN, FSI, I2C, LIN, PMBUS, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 512 Number of I2Cs 2
LQFP (PZ) 100 256 mm² (16 mm × 16 mm) LQFP (PM) 64 144 mm² (12 mm × 12 mm) LQFP (PN) 80 196 mm² (14 mm × 14 mm)
  • Real-time processing:
    • 160MHz C28x 32-bit DSP CPU
    • Equivalent to 320MHz Arm® Cortex®-M7 based device on real-time signal chain performance (see the Real-time Benchmarks Showcasing C2000™ Control MCU’s Optimized Signal Chain Application Note
    • IEEE 754 single-precision Floating-Point Unit (FPU32)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • CRC Engine and Instructions (VCRC)
  • Programmable Control Law Accelerator (CLA)
  • On-chip memory
    • 576KB of flash (ECC-protected) across five independent banks
      • Two 256KB banks
      • One 64KB bank, ideal of LFU/Bootloaders/data
    • 2KB of OTP (One Time Programmable flash memory)
    • 101KB of RAM (ECC/Parity protected)
  • Security
    • Secure Boot
    • JTAG Lock
    • Advanced Encryption Standard (AES) accelerator
    • Unique Identification (UID) number
  • Clock and system control
    • Two internal 10MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
    • 5V failsafe and tolerant capability on 4 GPIOs for PMBUS/I2C support
    • Configurable 1.35V VIH on 4 GPIOs
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 66 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins (19 shared with Analog)
    • 16 digital inputs on analog pins
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
      • Fast Plus Mode Support - 1MHz SCL
      • 5V/3.3V/1.35V VIH support on select pins
    • Two Inter-integrated Circuit (I2C) interfaces
    • One Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
      • 4KB message RAM per MCAN module, independent of system memory
      • Ability to re-use RAM for CPU data variables if MCAN is not used
    • Two Serial Peripheral Interface (SPI) ports
    • Three UART-compatible Serial Communication Interface (SCI)
    • One UART-compatible Local Interconnect Network (LIN) interface
    • Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
  • Analog system
    • Five 3.9MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 35 external channels (includes one gpdac output)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
      • Low DAC output to pin capability on CMPSS1
    • Two 12-bit buffered DAC output
    • Three Programmable Gain Amplifiers (PGAs)
      • Unity gain support
      • Inverting and non-inverting gain mode support
      • Programmable output filtering
  • Enhanced control peripherals
    • 24 ePWM channels with 12 channels that have high-resolution capability (100ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Two Enhanced Capture (eCAP) modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • 8 Sigma-Delta Filter Module (SDFM) input channels, 2 independent filters per channel
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 4 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Live Firmware Update (LFU)
  • Diagnostic features
    • Memory Power-On Self-Test (MPOST)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 and IEC 61508 system design
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware integrity up to ASIL B targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL B by TÜV SÜD planned
  • Package options:
    • 100-pin Low-profile Quad Flatpack (LQFP)[PZ suffix]
    • 80-pin LQFP [PN suffix]
    • 80-pin LQFP [PNA suffix]
    • 64-pin LQFP [PM suffix]
    • 56-pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH suffix]
    • 49-ball Wafer Chip Scale Package(WCSP) [YAF suffix]
    • 32-pin Very Thin Quad Flatpack No-Lead (VQFN) [ZNG suffix]
  • Temperature options:
    • Junction (TJ): –40°C to 150°C
  • Real-time processing:
    • 160MHz C28x 32-bit DSP CPU
    • Equivalent to 320MHz Arm® Cortex®-M7 based device on real-time signal chain performance (see the Real-time Benchmarks Showcasing C2000™ Control MCU’s Optimized Signal Chain Application Note
    • IEEE 754 single-precision Floating-Point Unit (FPU32)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • CRC Engine and Instructions (VCRC)
  • Programmable Control Law Accelerator (CLA)
  • On-chip memory
    • 576KB of flash (ECC-protected) across five independent banks
      • Two 256KB banks
      • One 64KB bank, ideal of LFU/Bootloaders/data
    • 2KB of OTP (One Time Programmable flash memory)
    • 101KB of RAM (ECC/Parity protected)
  • Security
    • Secure Boot
    • JTAG Lock
    • Advanced Encryption Standard (AES) accelerator
    • Unique Identification (UID) number
  • Clock and system control
    • Two internal 10MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
    • 5V failsafe and tolerant capability on 4 GPIOs for PMBUS/I2C support
    • Configurable 1.35V VIH on 4 GPIOs
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 66 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins (19 shared with Analog)
    • 16 digital inputs on analog pins
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
      • Fast Plus Mode Support - 1MHz SCL
      • 5V/3.3V/1.35V VIH support on select pins
    • Two Inter-integrated Circuit (I2C) interfaces
    • One Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
      • 4KB message RAM per MCAN module, independent of system memory
      • Ability to re-use RAM for CPU data variables if MCAN is not used
    • Two Serial Peripheral Interface (SPI) ports
    • Three UART-compatible Serial Communication Interface (SCI)
    • One UART-compatible Local Interconnect Network (LIN) interface
    • Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
  • Analog system
    • Five 3.9MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 35 external channels (includes one gpdac output)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
      • Low DAC output to pin capability on CMPSS1
    • Two 12-bit buffered DAC output
    • Three Programmable Gain Amplifiers (PGAs)
      • Unity gain support
      • Inverting and non-inverting gain mode support
      • Programmable output filtering
  • Enhanced control peripherals
    • 24 ePWM channels with 12 channels that have high-resolution capability (100ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Two Enhanced Capture (eCAP) modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • 8 Sigma-Delta Filter Module (SDFM) input channels, 2 independent filters per channel
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 4 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Live Firmware Update (LFU)
  • Diagnostic features
    • Memory Power-On Self-Test (MPOST)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 and IEC 61508 system design
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware integrity up to ASIL B targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL B by TÜV SÜD planned
  • Package options:
    • 100-pin Low-profile Quad Flatpack (LQFP)[PZ suffix]
    • 80-pin LQFP [PN suffix]
    • 80-pin LQFP [PNA suffix]
    • 64-pin LQFP [PM suffix]
    • 56-pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH suffix]
    • 49-ball Wafer Chip Scale Package(WCSP) [YAF suffix]
    • 32-pin Very Thin Quad Flatpack No-Lead (VQFN) [ZNG suffix]
  • Temperature options:
    • Junction (TJ): –40°C to 150°C

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 160MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28P55x supports up to 576KB of flash memory divided into two 256KB banks plus one 64KB bank, which enable programming one bank and execution in another bank in parallel. Up to 101KB of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28P55x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28P55x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Twenty-four PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, and CAN FD) and offers multiple pin-muxing options for optimal signal placement.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD28P551X evaluation board and download C2000Ware.

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 160MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28P55x supports up to 576KB of flash memory divided into two 256KB banks plus one 64KB bank, which enable programming one bank and execution in another bank in parallel. Up to 101KB of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28P55x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28P55x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Twenty-four PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, and CAN FD) and offers multiple pin-muxing options for optimal signal placement.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD28P551X evaluation board and download C2000Ware.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TMS320F28P551, TMS320F28P552, and TMS320F28P558 Real-Time Microcontrollers datasheet PDF | HTML 15/05/2026
* Guía del usuario TMS320F28P551/2/8 Real-Time Microcontrollers Technical Reference Manual PDF | HTML 14/05/2026
* Errata TMS320F28P551, TMS320F28P552, and TMS320F28P558 Real-Time MCUs Silicon Errata PDF | HTML 15/08/2025
Application brief Enhancing EV Powertrain Efficiency: Optimizing Motor Control and Battery Performance With TMS320F28P55x MCUs PDF | HTML 14/05/2025

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TMDSCNCD28P55X — Módulo de evaluación controlCARD TMDSCNCD28P55X

TMDSCNCD28P55X es una placa de evaluación y desarrollo de bajo costo para la serie C2000™ MCU de dispositivos F28P55x de TI. Viene con un HSEC180 (conector de borde de alta velocidad de 180 pines) y es ideal como controlCARD para la evaluación inicial y el desarrollo de prototipos. Para la (...)

Guía del usuario: PDF | HTML
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En inventario
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No disponible
Kit de desarrollo de software (SDK)

C2000WARE — C2000Ware for C2000 Microcontrollers

El C2000Ware es un conjunto cohesivo de software y documentación creado para minimizar el tiempo de desarrollo. Incluye controladores específicos de dispositivos, bibliotecas y ejemplos de periféricos.

  • Esquemas de diseño de hardware, BOM, archivos gerber y documentación para controlCARDS C2000, (...)
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Kit de desarrollo de software (SDK)

C2000WARE-DIGITALPOWER-SDK — DigitalPower SDK for C2000 Real-time Controllers

    • DigitalPower SDK para microcontroladores (MCU) C2000™ es un conjunto cohesionado de infraestructura de software, herramientas y documentación diseñado para minimizar el tiempo de desarrollo de sistemas de potencia digital basados en MCU C2000, destinado a diversas aplicaciones de fuente de (...)
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C2000WARE-MOTORCONTROL-SDK — MotorControl software development kit (SDK) for C2000™ MCUs

El SDK de MotorControl para microcontroladores (MCU) C2000™ es un conjunto cohesionado de infraestructura de software, herramientas y documentación diseñado para minimizar el tiempo de desarrollo del sistema de control de motores basado en controladores en tiempo real C2000 destinado a diversas (...)

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IDE, configuración, compilador o depurador

C2000_CLA_SAFETI_CQKIT_RV — C2000™ and CLA safety compiler qualification kit (leverages compiler release validations)

El Kit de cualificación de compilador de seguridad se desarrolló para ayudar a los clientes a calificar el uso del compilador C/C++ ARM, C6000, C7000 o C2000/CLA de TI respecto de normas de seguridad funcional como IEC 61508 e ISO 26262.

El Kit de cualificación de compilador de seguridad:

  • Es (...)
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IDE, configuración, compilador o depurador

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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IDE, configuración, compilador o depurador

EDGE-AI-STUDIO-MCU — Edge AI Studio for Microcontrollers

Edge AI Studio es una colección de herramientas gráficas y de línea de comandos diseñadas para acelerar el desarrollo de Edge AI en procesadores y microcontroladores de TI. Ya sea que use el Model Zoo de TI para desarrollar una prueba de concepto o aproveche su propio modelo, Edge AI Studio (...)

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IDE, configuración, compilador o depurador

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

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Primeros pasos

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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Herramienta de programación de software

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash forma parte del amplio ecosistema de desarrollo CCStudio™ de TI y es una herramienta de software diseñada para programar la memoria flash integrada en los microcontroladores y dispositivos de conectividad inalámbrica de TI, así como la memoria flash integrada en los procesadores de TI. (...)

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Modelo de simulación

TMS320F28P551xx, TMS320F28P552xx and TMS320F28P558xx IBIS Model

SPRM890.ZIP (3748 KB) - Modelo IBIS
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Diseño de referencia

TIDA-011008 — Diseño de referencia de un inversor de cadena monofásico basado en GaN de 3.6 kW

Este diseño de referencia te da una idea general de cómo implementar un inversor de cadena monofásico basado en GaN. El diseño cuenta con una entrada de cadena, capaz de manejar hasta 10 paneles fotovoltaicos (PV) en serie. La potencia nominal desde las entradas de las cadenas hasta una conexión a (...)

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
LQFP (PZ) 100 Ultra Librarian
LQFP (PM) 64 Ultra Librarian
LQFP (PN) 80 Ultra Librarian
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