TXV0106

ACTIVO

Convertidor de tensión de 6 canales de doble alimentación y dirección fija

Detalles del producto

Bits (#) 6 Data rate (max) (Mbps) 500 Topology Push-Pull Direction control (typ) Fixed-direction Vin (min) (V) 1.14 Vin (max) (V) 3.6 Vout (min) (V) 1.14 Vout (max) (V) 3.6 Applications GPIO, JTAG, RGMII, SPI, UART Features Output damping resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation, Wettable flanks package Prop delay (ns) 2.3 Technology family TXV Supply current (max) (mA) 0.022 Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 6 Data rate (max) (Mbps) 500 Topology Push-Pull Direction control (typ) Fixed-direction Vin (min) (V) 1.14 Vin (max) (V) 3.6 Vout (min) (V) 1.14 Vout (max) (V) 3.6 Applications GPIO, JTAG, RGMII, SPI, UART Features Output damping resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation, Wettable flanks package Prop delay (ns) 2.3 Technology family TXV Supply current (max) (mA) 0.022 Rating Catalog Operating temperature range (°C) -40 to 125
WQFN (BQB) 16 8.75 mm² (3.5 mm × 2.5 mm)
  • Configurable design allows each port to operate with a power supply range from 1.2 V to 3.6 V

  • Supports up to 500Mbps for 1.65 V to 3.6 V
  • Meets RGMII 2.0 timing specifications:
    • < 750 ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10 Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12 mA at 3.6 V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8 V to 3.3 V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10-µA maximum (25°C)
    • 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Configurable design allows each port to operate with a power supply range from 1.2 V to 3.6 V

  • Supports up to 500Mbps for 1.65 V to 3.6 V
  • Meets RGMII 2.0 timing specifications:
    • < 750 ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10 Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12 mA at 3.6 V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8 V to 3.3 V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10-µA maximum (25°C)
    • 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C

The TXV0106 is a 6-bit, dual-supply fixed-direction low-skew, low jitter voltage translation device. This device can be used for redriving, voltage translation and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY. The Ax I/O pins and enable pin (OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

The TXV0106 transmits data in a fixed direction from the A bus to the B bus. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

The TXV0106 is a 6-bit, dual-supply fixed-direction low-skew, low jitter voltage translation device. This device can be used for redriving, voltage translation and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY. The Ax I/O pins and enable pin (OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

The TXV0106 transmits data in a fixed direction from the A bus to the B bus. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TXV0106 6-Bit Fix Direction Low Skew, Low-Jitter Voltage Translator or Buffer datasheet (Rev. A) PDF | HTML 12/04/2024
Application brief Enabling AI Accelerators with Voltage Level Translation and Analog Multiplexing (Rev. A) PDF | HTML 29/09/2025
Nota sobre la aplicación Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2/10/2024
Nota sobre la aplicación Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12/07/2024
Nota sobre la aplicación Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 3/07/2024
Nota sobre la aplicación Overcoming Design Challenges - Implementing High Performance Interfaces PDF | HTML 12/12/2023
Application brief Supporting Time and Skew Sensitive Interfaces with TI's TXV Level-Shifter PDF | HTML 27/10/2023
Application brief Enabling Industrial and Automotive Ethernet RGMII Interfaces with Voltage Transl PDF | HTML 2/08/2023

Diseño y desarrollo

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Placa de evaluación

14-24-NL-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados sin plomo de 14 a 24 pines

El 14-24-NL-LOGIC-EVM es un módulo de evaluación flexible (EVM) diseñado para admitir cualquier dispositivo lógico o de traducción que tenga un encapsulado BQA, BQB, RGY, RSV, RJW o RHL de 14 a 24 pines.

Guía del usuario: PDF | HTML
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Placa de evaluación

TXV0106-EVM — Módulo de evaluación TXV0106

El módulo de evaluación (EVM) TXV0106 es una plataforma fácil de usar para evaluar la funcionalidad y el rendimiento del dispositivo TXV0106. El EVM dispone de circuitos y puentes opcionales para configurar el dispositivo para diferentes aplicaciones. El dispositivo ofrece opciones de conversión (...)
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Modelo de simulación

TXV0106 IBIS Model

SCEM797.ZIP (44 KB) - Modelo IBIS
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Pedidos y calidad

Soporte y capacitación

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