제품 상세 정보

Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family AC Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 85
Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family AC Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 85
SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 7 ns at 5 V

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 7 ns at 5 V

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74AC245 octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

When the output-enable (OE)\ is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input. A high on OE\ disables the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74AC245 octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

When the output-enable (OE)\ is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input. A high on OE\ disables the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
SN74AHCT245-EP 활성 3상 출력을 지원하는 향상된 제품 5V 옥탈 버스 트랜시버 Voltage range (4.5V to 5.5V), average drive strength (8mA), average propagation delay (9ns)
SN74LVC245A-EP 활성 3상 출력을 지원하는 향상된 제품 8진 버스 트랜시버 Voltage range (1.65V to 3.6V), average drive strength (24mA), average propagation delay (5.5ns)

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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14개 모두 보기
유형 직함 날짜
* Data sheet SN74AC245-EP datasheet 2004/09/28
* VID SN74AC245-EP VID V6204760 2016/06/21
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
More literature HiRel Unitrode Power Management Brochure 2009/07/07
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

설계 및 개발

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패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (DW) 20 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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