產品詳細資料

Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 275 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 290 SFDR (dB) 80 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 275 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 290 SFDR (dB) 80 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
TQFP (PFB) 48 81 mm² 9 x 9 VQFN (RSL) 48 36 mm² 6 x 6
  • 10-Bit Dual Transmit DAC
  • 275 MSPS Update Rate
  • Single Supply: 3.0 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3): 78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2-V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Packages:
    • 48-Pin Thin-Quad Flat Pack (TQFP)
    • 48-Pin Very-Thin-Quad Flat No-Leads (VQFN)
  • 10-Bit Dual Transmit DAC
  • 275 MSPS Update Rate
  • Single Supply: 3.0 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3): 78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2-V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Packages:
    • 48-Pin Thin-Quad Flat Pack (TQFP)
    • 48-Pin Very-Thin-Quad Flat No-Leads (VQFN)

The DAC5652A is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 275 MSPS, the DAC5652A offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5652A has two, 10-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5652A also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652A has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported.

The DAC5652A is available in 48-pin TQFP and 48-pin VQFN packages. The TQFP package offers pin compatibility between family members that provides 10-bit (DAC5652A), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. The TQFP package is also pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to +85°C.

The DAC5652A is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 275 MSPS, the DAC5652A offers exceptional dynamic performance, tight-gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high-impedance, differential-current output, suitable for single-ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5652A has two, 10-bit, parallel input ports with separate clocks and data latches. For flexibility, the DAC5652A also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652A has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported.

The DAC5652A is available in 48-pin TQFP and 48-pin VQFN packages. The TQFP package offers pin compatibility between family members that provides 10-bit (DAC5652A), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. The TQFP package is also pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the industrial temperature range of –40°C to +85°C.

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* Data sheet DAC5652A Dual, 10-Bit, 275-MSPS Digital-to-Analog Converter datasheet (Rev. F) PDF | HTML 2018年 10月 10日
EVM User's guide DAC5652AEVM User's Guide 2018年 5月 11日
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日

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DAC5652AEVM — DAC5652A 雙通道、10 位元、275-MSPS 數位轉類比 (DAC) 評估模組

DAC5652A 評估模組 (EVM) 用於評估 DAC5652A,即 10位元、275-MSPS 數位轉類比轉換器 (DAC)。DAC5652AEVM 具有單端變壓器耦合類比輸出,可適應 DAC5652A 全刻度輸出取樣範圍。EVM 的設計可直接連接至 TI 的 TSW1400EVM 資料擷取/模式產生器工具。

透過高速資料轉換器專業級軟體 (DATACONVERTERPRO-SW) 分析工具提供額外支援。同時也提供 DAC5652AEVM 設計套件,其中包括電路圖、Gerber 及物料清單 (BOM)。

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模擬型號

DAC5652A IBIS Model

SLAM328.ZIP (7 KB) - IBIS Model
模擬型號

IBIS Model for DAC5652A

SLAC171.ZIP (3 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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