LP8900

現行

具啟用功能的 200-mA、低雜訊、高準確度、雙通道低壓降電壓穩壓器

產品詳細資料

Output options Dual output, Fixed Output Iout (max) (A) 0.2 Vin (max) (V) 5.5 Vin (min) (V) 1.8 Vout (max) (V) 2.8 Vout (min) (V) 1.2 Fixed output options (V) 1.2, 2.7, 2.8, 3.3 Rating Catalog Noise (µVrms) 6 PSRR at 100 KHz (dB) 45 Iq (typ) (mA) 0.085 Thermal resistance θJA (°C/W) 140 Load capacitance (min) (µF) 1 Regulated outputs (#) 2 Features Enable Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Dual output, Fixed Output Iout (max) (A) 0.2 Vin (max) (V) 5.5 Vin (min) (V) 1.8 Vout (max) (V) 2.8 Vout (min) (V) 1.2 Fixed output options (V) 1.2, 2.7, 2.8, 3.3 Rating Catalog Noise (µVrms) 6 PSRR at 100 KHz (dB) 45 Iq (typ) (mA) 0.085 Thermal resistance θJA (°C/W) 140 Load capacitance (min) (µF) 1 Regulated outputs (#) 2 Features Enable Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
DSBGA (YZR) 6 2.1875 mm² 1.75 x 1.25
  • Input Voltage Operation: 1.8 V to 5.5 V
  • Output Voltage: 1.2 V to 3.6 V
  • Accuracy Over Temperature: 1%
  • Output Voltage Noise: 6 µVRMS
  • PSRR: 75 dB at 1 kHz
  • Dropout: 110 mV at 200 mA Load
  • Quiescent Current: 48 µA per Regulator
  • Start-Up Time: 80 µs
  • Stable With Ceramic Capacitors as Small as 0402
  • Thermal-Overload and Short-Circuit Protection
  • Input Voltage Operation: 1.8 V to 5.5 V
  • Output Voltage: 1.2 V to 3.6 V
  • Accuracy Over Temperature: 1%
  • Output Voltage Noise: 6 µVRMS
  • PSRR: 75 dB at 1 kHz
  • Dropout: 110 mV at 200 mA Load
  • Quiescent Current: 48 µA per Regulator
  • Start-Up Time: 80 µs
  • Stable With Ceramic Capacitors as Small as 0402
  • Thermal-Overload and Short-Circuit Protection

The LP8900 is a dual LDO capable of supplying 200-mA output current per regulator. Designed to meet the requirements of RF and analog circuits, the LP8900 provides low device noise, high PSRR, low quiescent current, and superior line transient response figures.

Using new innovative design techniques, the LP8900 offers class-leading device noise performance without a noise bypass capacitor.

The LP8900 is designed to be stable with space saving ceramic capacitors as small as 0402 case size, enabling a solution size < 4 mm2. Performance is specified for a –40°C to +125°C junction temperature range.

Output voltage options from 1.2 V to 3.6 V are available; for availability, contact your local TI sales office.

For all available packages, see the orderable addendum at the end of the data sheet.

The LP8900 is a dual LDO capable of supplying 200-mA output current per regulator. Designed to meet the requirements of RF and analog circuits, the LP8900 provides low device noise, high PSRR, low quiescent current, and superior line transient response figures.

Using new innovative design techniques, the LP8900 offers class-leading device noise performance without a noise bypass capacitor.

The LP8900 is designed to be stable with space saving ceramic capacitors as small as 0402 case size, enabling a solution size < 4 mm2. Performance is specified for a –40°C to +125°C junction temperature range.

Output voltage options from 1.2 V to 3.6 V are available; for availability, contact your local TI sales office.

For all available packages, see the orderable addendum at the end of the data sheet.

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類型 標題 日期
* Data sheet LP8900 200-mA Ultra-Low-Noise Dual LDO For RF and Analog Circuits datasheet (Rev. E) PDF | HTML 2016年 6月 1日
Application note A Topical Index of TI LDO Application Notes (Rev. F) 2019年 6月 27日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 2018年 3月 21日

設計與開發

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模擬型號

LP8900-3333 PSpice Transient Model

SNVMB08.ZIP (71 KB) - PSpice Model
模擬型號

LP8900-3333 Unencrypted PSpice Transient Model

SNVMB07.ZIP (3 KB) - PSpice Model
模擬型號

LP8900-AAAH PSpice Transient Model

SNVMB09.ZIP (72 KB) - PSpice Model
模擬型號

LP8900-AAAH Unencrypted PSpice Transient Model

SNVMB06.ZIP (3 KB) - PSpice Model
模擬型號

LP8900-AAEB PSpice Transient Model

SNVMB10.ZIP (75 KB) - PSpice Model
模擬型號

LP8900-AAEB Unencrypted PSpice Transient Model

SNVMB11.ZIP (3 KB) - PSpice Model
模擬型號

LP8900-AAEC PSpice Transient Model

SNVMB13.ZIP (72 KB) - PSpice Model
模擬型號

LP8900-AAEC Unencrypted PSpice Transient Model

SNVMB12.ZIP (3 KB) - PSpice Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YZR) 6 Ultra Librarian

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