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SN74LVC1G08-Q1

現行

車用 1 通道、2 輸入、1.65-V 至 5.5-V 32-mA 驅動強度 AND 閘

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產品規格表

SN74LVC1G08-Q1

現行
產品規格表 立即訂購

產品詳細資料

Technology family LVC Number of channels 1 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm) SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm)
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
  • Supports operation: 5V VCC
  • Over-voltage tolerant inputs accept voltages: to 5.5V
  • Provides down translation: to VCC
  • Low power consumption: 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports live insertion, partial-power-down mode, and back drive protection
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
  • Supports operation: 5V VCC
  • Over-voltage tolerant inputs accept voltages: to 5.5V
  • Provides down translation: to VCC
  • Low power consumption: 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports live insertion, partial-power-down mode, and back drive protection
  • Latch-up performance exceeds 100mA per JESD 78, Class II

This single 2-input positive-AND gate is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G08-Q1 device performs the Boolean function or Y = A · B or Y = Ā + B̅ in positive logic.

This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when powered down.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G08-Q1 is available in a variety of packages, including the small DRY package with a body size of 1.45mm × 1.00mm.

This single 2-input positive-AND gate is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G08-Q1 device performs the Boolean function or Y = A · B or Y = Ā + B̅ in positive logic.

This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when powered down.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G08-Q1 is available in a variety of packages, including the small DRY package with a body size of 1.45mm × 1.00mm.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74LVC1G08-Q1 Single 2-Input Positive-AND Gate datasheet (Rev. H) PDF | HTML 2026/8/14
Application brief Optimizing ADAS Domain Controllers Using Logic and Translation PDF | HTML 2023/7/13
Product overview Generate an Enable Signal that can be Toggled PDF | HTML 2023/6/14
功能安全資訊 SN74LVC1G08-Q1 Functional Safety FIT Rate and Failure Mode Distribution 2019/12/30
更多文件說明 Automotive Logic Devices Brochure 2014/8/27

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SN74LVC1G08 Behavioral SPICE Model

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