The FRAM can be protected by the MPU from inadvertent CPU execution, read access, or write access. See Table 9-67 for control and configuration registers. Features of the MPU include:
- IP encapsulation with programmable boundaries in steps of 1KB (prevents reads from "outside"; for example, through JTAG or by non-IP software).
- Main memory partitioning is programmable up to three segments in steps of 1KB.
- Access rights of each segment can be individually selected (main and information memory).
- Access violation flags with interrupt capability for easy servicing of access violations.