SLASFA2B November   2024  – October 2025 MSPM0G1518 , MSPM0G1519 , MSPM0G3518 , MSPM0G3519

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
    1. 5.1 Device Comparison Chart
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
      16.      28
      17.      29
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 System Phase Lock Loop (SYSPLL)
      4. 7.9.4 Low Frequency Crystal/Clock
      5. 7.9.5 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 DAC
      1. 7.16.1 DAC_Supply Specifications
      2. 7.16.2 DAC Output Specifications
      3. 7.16.3 DAC Dynamic Specifications
      4. 7.16.4 DAC Linearity Specifications
      5. 7.16.5 DAC Timing Specifications
    17. 7.17 I2C
      1. 7.17.1 I2C Characteristics
      2. 7.17.2 I2C Filter
      3. 7.17.3 I2C Timing Diagram
    18. 7.18 SPI
      1. 7.18.1 SPI
      2. 7.18.2 SPI Timing Diagram
    19. 7.19 UART
    20. 7.20 TIMx
    21. 7.21 TRNG
      1. 7.21.1 TRNG Electrical Characteristics
      2. 7.21.2 TRNG Switching Characteristics
    22. 7.22 Emulation and Debug
      1. 7.22.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0Gx51x)
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 VREF
    16. 8.16 COMP
    17. 8.17 DAC
    18. 8.18 Security
    19. 8.19 TRNG
    20. 8.20 AESADV
    21. 8.21 Keystore
    22. 8.22 CRC-P
    23. 8.23 MATHACL
    24. 8.24 UART
    25. 8.25 I2C
    26. 8.26 SPI
    27. 8.27 CAN-FD
    28. 8.28 Low-Frequency Sub System (LFSS)
    29. 8.29 RTC_B
    30. 8.30 IWDT_B
    31. 8.31 WWDT
    32. 8.32 Timers (TIMx)
    33. 8.33 Device Analog Connections
    34. 8.34 Input/Output Diagrams
    35. 8.35 Serial Wire Debug Interface
    36. 8.36 Boot Strap Loader (BSL)
    37. 8.37 Device Factory Constants
    38. 8.38 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tray Information
    2.     PACKAGE OPTION ADDENDUM

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ZAW|100
  • PM|64
  • RGZ|48
  • RHB|32
  • PN|80
  • PZ|100
  • PT|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.8.2 Peripheral File Map

Table 8-6 lists the available peripherals and the register base address for each.

Table 8-6 Peripherals Summary

Peripheral Name

Base Address

Size

ADC0

0x40000000

0x2000

ADC1

0x40002000

0x2000

COMP0

0x40008000

0x2000

COMP1

0x4000A000

0x2000

COMP2

0x4000C000

0x2000

DAC0

0x40018000

0x2000

VREF

0x40030000

0x2000

WWDT0

0x40080000

0x2000

WWDT1

0x40082000

0x2000

TIMG0

0x40084000

0x2000

TIMG8

0x40090000

0x2000

TIMG9

0x40092000

0x2000

RTC_B

0x40094000

0x2000

TIMG14

0x40096000

0x2000

GPIOA

0x400A0000

0x2000

GPIOB

0x400A2000

0x2000

GPIOC

0x400A4000

0x2000

KEYSTORE

0x400AC000

0x2000

SYSCTL

0x400AF000

0x4000

DEBUGSS

0x400C7000

0x2000

EVENT

0x400C9000

0x3000

NVM

0x400CD000

0x2000

I2C0

0x400F0000

0x2000

I2C1

0x400F2000

0x2000

I2C2

0x400F4000

0x2000

UART1

0x40100000

0x2000

UART0

0x40108000

0x2000

UART7

0x4010A000

0x2000

MCPUSS

0x40400000

0x2000

MTB

0x40402000

0x1000

MTBRAM

0x40403000

0x0020

MATHACL

0x40410000

0x2000

IOMUX

0x40428000

0x2000

DMA

0x4042A000

0x2000

CRC

0x40440000

0x2000

AESADV

0x40442000

0x2000

TRNG

0x40444000

0x2000

SPI0

0x40468000

0x2000

SPI1

0x4046A000

0x2000

SPI2

0x4046C000

0x2000

UART3

0x40500000

0x2000

UART4

0x40502000

0x2000

UART5

0x40504000

0x2000

UART6

0x40506000

0x2000

MCAN0

0x40508000

0x8000

MCAN1

0x40510000

0x8000

ADC0(1)

0x40556000

0x2000

ADC1(1)

0x40558000

0x2000

TIMA0

0x40860000

0x2000

TIMA1

0x40862000

0x2000

TIMG6

0x40868000

0x2000

TIMG7

0x4086A000

0x2000

TIMG12

0x40870000

0x2000

(1) Aliased region of ADC0 and ADC1 memory-mapped registers