SLASEG6B May 2018 – June 2020 TAS3251
|LEGEND: R/W = Read/Write; R = Read only; -n = value after reset|
|4||RSTM||R/W||0||Reset Modules – This bit resets the interpolation filter and the DAC modules. Since the DSP is also reset, the coeffient RAM content will also be cleared by the DSP. This bit is auto cleared and can be set only in standby mode.
|0||RSTR||R/W||0||Reset Registers – This bit resets the mode registers back to their initial values. The RAM content is not cleared, but the execution source will be back to ROM. This bit is auto cleared and must be set only when the DAC is in standby mode (resetting registers when the DAC is running is prohibited and not supported).