SLASEG6B May 2018 – June 2020 TAS3251
|LEGEND: R/W = Read/Write; R = Read only; -n = value after reset|
|7-0||DLSD||R/W||0||Left DAC secondary DC dither – These bits control the DC dither amount to be added to the lower part of the left channel secondary DAC modulator. The DC dither is expressed is Q0.11 format, with 1.0 equals to 1/32 fullscale modulator input.
00000000000 : No DC dither