JAJSQ88E february   2006  – october 2020 SN65LVDS301

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings #GUID-B6F760D2-14EB-4E2D-91AA-4EF9E63722A7/SLLS6819275
    2. 6.2  Thermal Information
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Device Electrical Characteristics
    5. 6.5  Output Electrical Characteristics
    6. 6.6  Input Electrical Characteristics
    7. 6.7  Switching Characteristics
    8. 6.8  Timing Characteristics
    9. 6.9  Device Power Dissipation
    10. 6.10 Typical characteristics
  8. 7 Parameter Measurement Information
    1.     19
      1. 7.1.1 Power Consumption Tests
        1. 7.1.1.1 Typical IC Power Consumption Test Pattern
        2. 7.1.1.2 22
      2. 7.1.2 Maximum Power Consumption Test Pattern
      3. 7.1.3 Output Skew Pulse Position & Jitter Performance
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Swap Pin Functionality
      2. 8.3.2 Parity Bit Generation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Serialization Modes
        1. 8.4.1.1 1-Channel Mode
        2. 8.4.1.2 2-Channel Mode
        3. 8.4.1.3 3-Channel Mode
      2. 8.4.2 Powerdown Modes
      3. 8.4.3 Shutdown Mode
      4. 8.4.4 Standby Mode
      5. 8.4.5 Active Modes
      6. 8.4.6 Acquire Mode (PLL approaches lock)
      7. 8.4.7 Transmit Mode
      8. 8.4.8 Status Detect and Operating Modes Flow diagram
  10. 9 Application information
    1. 9.1 Application Information
    2. 9.2 Preventing Increased Leakage Currents in Control Inputs
    3. 9.3 VGA Application
    4. 9.4 Dual LCD-Display Application
    5. 9.5 Typical Application Frequencies
      1. 9.5.1 Calculation Example: HVGA Display
  11. 10Power Supply Design Recommendation
    1. 10.1 Decoupling Recommendation
  12. 11Layout
    1. 11.1 Layout Guidelines
  13. 12Device and Documentation Support
    1. 12.1 サポート・リソース
    2. 12.2 Trademarks
    3. 12.3 静電気放電に関する注意事項
    4. 12.4 用語集
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.1 Swap Pin Functionality

The SWAP pin allows the pcb designer to reverse the RGB bus to minimize potential signal crossovers in the PCB routing. The two drawings beneath show the RGB signal pin assignment based on the SWAP-pin setting.

GUID-2038E5FA-FF15-4861-9E35-8C99C83C7F17-low.gifFigure 8-2 SWAP PIN = 0
GUID-43FBF252-A9C3-4C45-8DEC-CA9CC1B52A2A-low.gifFigure 8-3 SWAP PIN = 1
Table 8-1 NUMERIC PIN LIST
PINSWAPSIGNAL.PINSWAPSIGNAL.PINSWAPSIGNAL
A1—GNDC10B6F10B1
A20G21R11R6
1G5C20B7F20B2
A30G41R01R5
1G3C3UNPOPULATEDF3—VDD
A40G6C4—VDDF4—GND
1G1C5—GNDF5—GND
A50R0C6—VDDF6—GND
1B7C7—VDDF7—GND
A60R2C8—GNDF8—VDDPLLD
1B5C9—LS0F9—D1+
A70R4D10B4G1—PCLK
1B31R3G20B0
A80R6D20B51R7
1B11R2G3—VDD
A9—GNDD3—VDDG4—GND
B10G0D4—GNDG5—GND
1G7D5—GNDG6—GND
B20G1D6—GNDG7—GND
1G6D7—GNDG8—GNDLVDS
B30G3D8—LS1G9—D1–
1G4D9—D2+H1—HS
B40G5E10B3H2—VS
1G21R4H3—GND
B50G7E2—GNDH4—GNDLVDS
1G0E3—VDDH5—VDDLVDS
B60R1E4—GNDH6—GNDPLLA
1B6E5—GNDH7—VDDPLLA
B70R3E6—GNDH8—VDDLVDS
1B4E7—GNDH9—CPOL
B80R5E8—GNDPLLDJ1—GND
1B2E9—D2–J2—DE
B90R7J3—TXEN
1B0J4—D0–
J5—D0+
J6—CLK–
J7—CLK+
J8—SWAP
J9—GNDLVDS