SLAA559E April   2014  – November 2016 MSP430AFE221 , MSP430AFE222 , MSP430AFE223 , MSP430AFE231 , MSP430AFE232 , MSP430AFE233 , MSP430AFE251 , MSP430AFE252 , MSP430AFE253 , MSP430F2001 , MSP430F2002 , MSP430F2003 , MSP430F2011 , MSP430F2012 , MSP430F2013 , MSP430F2013-EP , MSP430F2101 , MSP430F2111 , MSP430F2112 , MSP430F2121 , MSP430F2122 , MSP430F2131 , MSP430F2132 , MSP430F2232 , MSP430F2234 , MSP430F2252 , MSP430F2254 , MSP430F2272 , MSP430F2274 , MSP430F233 , MSP430F2330 , MSP430F235 , MSP430F2350 , MSP430F2370 , MSP430F2410 , MSP430F2416 , MSP430F2417 , MSP430F2418 , MSP430F2419 , MSP430F247 , MSP430F2471 , MSP430F248 , MSP430F2481 , MSP430F249 , MSP430F2491 , MSP430F2616 , MSP430F2617 , MSP430F2618 , MSP430F2619 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5994 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891 , MSP430G2001 , MSP430G2101 , MSP430G2102 , MSP430G2111 , MSP430G2112 , MSP430G2121 , MSP430G2131 , MSP430G2132 , MSP430G2152 , MSP430G2153 , MSP430G2201 , MSP430G2202 , MSP430G2203 , MSP430G2210 , MSP430G2211 , MSP430G2212 , MSP430G2213 , MSP430G2221 , MSP430G2230 , MSP430G2231 , MSP430G2232 , MSP430G2233 , MSP430G2252 , MSP430G2253 , MSP430G2302 , MSP430G2303 , MSP430G2312 , MSP430G2313 , MSP430G2332 , MSP430G2333 , MSP430G2352 , MSP430G2353 , MSP430G2402 , MSP430G2403 , MSP430G2412 , MSP430G2413 , MSP430G2432 , MSP430G2433 , MSP430G2452 , MSP430G2453 , MSP430G2513 , MSP430G2533 , MSP430G2553

 

  1.   Migrating from the MSP430F2xx and MSP430G2xx Families to the MSP430FR58xx/FR59xx/68xx/69xx Family
    1.     Trademarks
    2. 1 Introduction
    3. 2 In-System Programming of Nonvolatile Memory
      1. 2.1 Ferroelectric RAM (FRAM) Overview
      2. 2.2 FRAM Cell
      3. 2.3 Protecting FRAM Using the Memory Protection Unit
        1. 2.3.1 Dynamically Partitioning FRAM
      4. 2.4 FRAM Memory Wait States
      5. 2.5 Bootloader (BSL)
      6. 2.6 JTAG and Security
      7. 2.7 Production Programming
    4. 3 Hardware Migration Considerations
    5. 4 Device Calibration Information
    6. 5 Important Device Specifications
    7. 6 Core Architecture Considerations
      1. 6.1 Power Management Module (PMM)
      2. 6.2 Clock System
      3. 6.3 Operating Modes, Wakeup, and Reset
      4. 6.4 Determining the Cause of Reset
      5. 6.5 Interrupt Vectors
      6. 6.6 FRAM and the FRAM Controller
        1. 6.6.1 Flash and FRAM Overview Comparison
        2. 6.6.2 Cache Architecture
      7. 6.7 RAM Controller (RAMCTL)
    8. 7 Peripheral Considerations
      1. 7.1 Watchdog Timer
      2. 7.2 Ports
        1. 7.2.1 Digital Input/Output
        2. 7.2.2 Capacitive Touch I/O
      3. 7.3 Analog-to-Digital Converters
        1. 7.3.1 ADC12 to ADC12_B
        2. 7.3.2 ADC10 to ADC12_B
      4. 7.4 REF_A Module
      5. 7.5 Comparator_A to Comparator_E
      6. 7.6 Hardware Multiplier (HWMPY32)
      7. 7.7 DMA Controller
      8. 7.8 Low-Energy Accelerator (LEA) for Signal Processing
      9. 7.9 Communication Modules
        1. 7.9.1 USI to eUSCI
        2. 7.9.2 USCI to eUSCI
    9. 8 Conclusion
    10. 9 References
  2.   Revision History

6.2 Clock System

The FR59xx Clock System (CS) shares some similarities with the F2xx Basic Clock System (BCS) in that it uses an internal digitally controlled oscillator (DCO) to provide pre-calibrated frequencies. The FR59xx also provides all of the same clock source options and system clocks as the F2xx family.

A significant difference in the FR59xx DCO is that it can be configured only to the factory-provided calibrated frequencies and does not provide the in-between frequency steps available on the F2xx DCO.

While the FR59xx can source MCLK at 16 MHz, it should be noted that FRAM access is limited to 8 MHz by the FRAM controller and wait states are required. For configuring wait states, see Section 2.4. Code execution from RAM, accesses to peripherals, and DMA accesses between peripherals and RAM can be carried out at 16 MHz.

The ADC module's internal oscillator on the F2xx family has been renamed to MODOSC in the FR59xx family (similar to the F5xx family). This clock source is also used to derive a fail-safe clock source called LFMODCLK for the XT1 oscillator by using a divider.

The FR59xx CS supports the 'clocks-on-demand' feature. In the F2xx family, the availability of a system clock is impacted by entry into a low-power mode. For example, SMCLK is turned off in LPM3 and, hence, any peripheral such as a timer that uses SMCLK is inactive in LPM3. The FR59xx, however, allows the LPM settings to be overridden by a clock request. As long as there is an active request for a clock from a peripheral, the clock remains on, regardless of the LPM setting. This is most easily seen when there is increased power consumption when porting code between families. It is left to the user to disable any clock source requests that prevent the device from entering the required LPM. As an option, this feature can be disabled using the Clock System Control 6 Register (CSCTL6) (CLKREQEN bits).

EnergyTrace++™ Technology can be used to verify or diagnose if the clock sources are turned on or off as expected during LPMx. To learn more about EnergyTrace++ Technology, see MSP430 Advanced Power Optimizations: ULP Advisor SW and EnergyTrace™ Technology.

Table 2 lists important differences between the clock systems.

Table 2. Comparison of FR59xx and F2xx Clock Systems

Parameter or Feature FR59xx F2xx
Maximum system frequency, fSYSTEM 16 MHz 16 MHz
DCO range Calibrated frequencies only 0.06 to 26 MHz
Production calibrated frequencies 1 MHz, 2.66 MHz, 3.5 MHz, 4 MHz, 5.3 MHz, 7 MHz, 8 MHz, 16 MHz, 21 MHz, and 24 MHz 1 MHz, 8 MHz, 12 MHz, and 16 MHz
Clock sources for ACLK LFXTCLK, VLOCLK, LFMODCLK
(MODOSC / 128)		 LFXTCLK, VLOCLK
LFMODCLK (MODOSC/128) Available Not Available
External crystal fail-safe options XT1, LF: defaults to LFMODCLK
XT2, HF: defaults to MODOSC		 For any crystal failure: OFIFG is set, MCLK sourced by crystal defaults to DCO.
Other clock sources do not have a fail‑safe option.
Registers CSCTL0 through CSCTL6 DCOCTL, BCSCTL1 through BCSCTL3
VLO control Available with VLOOFF bit Available with OSCOFF in LPM4
XT1 oscillator Supports only LF mode Supports LF and HF modes
XT2 oscillator Supports up to 24 MHz Supports up to 16 MHz
Internal load capacitors for XT1 oscillator Not available Available