SLASFB6 December   2025 MSPM33C321A

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      10
    3. 6.3 Signal Descriptions
      1.      12
      2.      13
      3.      14
      4.      15
      5.      16
      6.      17
      7.      18
      8.      19
      9.      20
      10.      21
      11.      22
      12.      23
      13.      24
      14.      25
      15.      26
      16.      27
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
      4. 7.5.4 VBAT current consumption
    6. 7.6  Flash Memory Characteristics
    7. 7.7  Power Supply Sequencing
      1. 7.7.1 Power Supply Ramp
      2. 7.7.2 POR and BOR
      3. 7.7.3 VBat Characteristics
      4. 7.7.4 Timing Characteristics
    8. 7.8  Clock Specifications
      1. 7.8.1 System Oscillator (SYSOSC)
      2. 7.8.2 High Frequency Crystal/Clock
      3. 7.8.3 System Phase Lock Loop (SYSPLL)
      4. 7.8.4 Low Frequency Oscillator (LFOSC)
      5. 7.8.5 Low Frequency Crystal/Clock
    9. 7.9  Analog Specifications
      1. 7.9.1 ADC Specifications
        1. 7.9.1.1 ADC Electrical Characteristics
        2. 7.9.1.2 ADC Switching Characteristics
        3. 7.9.1.3 ADC Linearity Parameters
        4. 7.9.1.4 Typical Connection Diagram
      2. 7.9.2 COMP Specifications
        1. 7.9.2.1 Comparator Electrical Characteristics
        2. 7.9.2.2 COMP DAC Electrical Characteristics
      3. 7.9.3 VREF Specifications
        1. 7.9.3.1 VREF Voltage Characteristics
        2. 7.9.3.2 VREF Electrical Characteristics
      4. 7.9.4 Analog VBOOST Specification
        1. 7.9.4.1 Analog Mux VBOOST
      5. 7.9.5 Temperature Sensor
    10. 7.10 Serial Interface Specifications
      1. 7.10.1 UART
        1. 7.10.1.1 UART
      2. 7.10.2 I2C
        1. 7.10.2.1 I2C Characteristics
        2. 7.10.2.2 I2C Filter
        3. 7.10.2.3 I2C Timing Diagram
      3. 7.10.3 SPI
        1. 7.10.3.1 SPI
        2. 7.10.3.2 SPI Timing Diagram
      4. 7.10.4 CAN
        1. 7.10.4.1 CAN
      5. 7.10.5 QSPI
        1. 7.10.5.1 QSPI
        2. 7.10.5.2 QSPI Timing Diagram
      6. 7.10.6 I2S/TDM
        1. 7.10.6.1 Serial Audio
        2. 7.10.6.2 I2S/TDM Timing Diagram
    11. 7.11 Digital IO
    12. 7.12 TRNG
      1. 7.12.1 TRNG Electrical Characteristics
      2. 7.12.2 TRNG Switching Characteristics
    13. 7.13 Emulation and Debug
      1. 7.13.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Arm Cortex-M33 core with TrustZone and FPU
    2. 8.2  Power Management and Clock Unit (PMCU)
      1. 8.2.1 Power Management Unit (PMU)
      2. 8.2.2 Clock Module (CKM)
      3. 8.2.3 Operating Modes
        1. 8.2.3.1 Functionality by Operating Mode
    3. 8.3  Device Memory Map
      1. 8.3.1 Memory Organization
      2. 8.3.2 Peripheral Memory Map
    4. 8.4  NVIC Interrupt Map
    5. 8.5  Embedded Flash Memory
    6. 8.6  Embedded SRAM
    7. 8.7  DMA
    8. 8.8  Event Manager
    9. 8.9  Error Aggregator Module (EAM)
    10. 8.10 GPIO
    11. 8.11 IOMUX
      1. 8.11.1 Input/Output Diagrams
    12. 8.12 Analog Modules
      1. 8.12.1 HSADC
      2. 8.12.2 COMP
      3. 8.12.3 Temperature Sensor
      4. 8.12.4 VREF
      5. 8.12.5 Device Analog Connections
    13. 8.13 Security and Cryptography
      1. 8.13.1 Global Security Controller (GSC)
      2. 8.13.2 AESADV
      3. 8.13.3 SHA256
      4. 8.13.4 Public Key Algorithm (PKA)
      5. 8.13.5 TRNG
      6. 8.13.6 Keystore
      7. 8.13.7 CRC
    14. 8.14 Serial Communication Interfaces
      1. 8.14.1 UNICOMM (UART/I2C/SPI)
        1. 8.14.1.1 UART (UNICOMM)
        2. 8.14.1.2 I2C (UNICOMM)
        3. 8.14.1.3 SPI (UNICOMM)
      2. 8.14.2 CAN-FD
      3. 8.14.3 Quad SPI (QSPI)
      4. 8.14.4 Digital Audio Interface - I2S/TDM
    15. 8.15 LFSS
    16. 8.16 Timers, RTC and Watchdogs
      1. 8.16.1 Timers (TIMx)
      2. 8.16.2 RTC_A
      3. 8.16.3 IWDT
      4. 8.16.4 WWDT
    17. 8.17 Serial Wire Debug Interface
    18. 8.18 Bootstrap Loader (BSL)
    19. 8.19 Device Factory Constants
    20. 8.20 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.3.2 Peripheral Memory Map

Table 8-4 lists the available peripherals and the register base address for each in the secure and non-secure regions.

Table 8-3 Peripherals Memory Map
Peripheral Name Non-Secure Base Address Secure Base Address Size
HSADC0.CONFIG 0x4000.0000 0x5000.0000 0x2000
HSADC1.CONFIG 0x4000.2000 0x5000.2000 0x2000
HSADC0.FIFO 0x4000.5000 0x5000.5000 0x1000
HSADC1.FIFO 0x4000.7000 0x5000.7000 0x1000
TIMA0_0 0x4001.0000 0x5001.0000 0x2000
TIMA0_1 0x4001.2000 0x5001.2000 0x2000
DMA0 0x4002.0000 0x5002.0000 0x2000
DMA1 0x4002.2000 0x5002.2000 0x2000
FRI 0x4002.8000 0x5002.8000 0x2000
SYSMEM.CONFIG 0x4002.B000 0x5002.B000 0x2000
EAM 0x4002.D000 0x5002.D000 0x2000
QSPI 0x4003.2000 0x5003.2000 0x2000
NVMNW 0x4004.2000 0x5004.2000 0x2000
TRNG 0x4004.4000 0x5004.4000 0x2000
GSC 0x4004.7000 0x5004.7000 0x1000
UNICOMM1_0 (UC1_0) 0x4058.2000 0x5058.2000 0x2000
UC1_0.UART 0x4050.3000 0x5050.3000 0x1000
UC1_0.I2CC 0x4052.3000 0x5052.3000 0x1000
UC1_0.I2CT 0x4054.3000 0x5054.3000 0x1000
UNICOMM1_1 (UC1_1) 0x4058.4000 0x5058.4000 0x2000
UC1_1.UART 0x4050.5000 0x5050.5000 0x1000
UC1_1.I2CC 0x4052.5000 0x5052.5000 0x1000
UC1_1.I2CT 0x4054.5000 0x5054.5000 0x1000
SPG0 0x405A.1000 0x505A.1000 0x1000
UNICOMM2 (UC2) 0x4068.A000 0x5068.A000 0x2000
UC2.SPI 0x4066.1000 0x5066.1000 0x1000
UNICOMM15_0 (UC15_0) 0x4068.4000 0x5068.4000 0x2000
UC15_0.I2CC 0x4062.5000 0x5062.5000 0x1000
UC15_0.I2CT 0x4064.5000 0x5064.5000 0x1000
UNICOMM15_1 (UC15_1) 0x4068.6000 0x5068.6000 0x2000
UC15_1.I2CC 0x4062.7000 0x5062.7000 0x1000
UC15_1.I2CT 0x4064.7000 0x5064.7000 0x1000
UNICOMM12 (UC12) 0x4068.8000 0x5068.8000 0x2000
UC12.UART 0x4060.9000 0x5060.9000 0x1000
UNICOMM13_0 (UC13_0) 0x4068.0000 0x5068.0000 0x2000
UC13_0.UART 0x4060.B000 0x5060.B000 0x1000
UC13_0.I2CC 0x4062.B000 0x5062.B000 0x1000
UC13_0.I2CT 0x4064.B000 0x5064.B000 0x1000
UC13_0.SPI 0x4066.B000 0x5066.B000 0x1000
SPG1 0x406A.1000 0x506A.1000 0x1000
UNICOMM13_1 (UC13_1) 0x4076.1000 0x5076.1000 0x1000
UC13_1.UART 0x4070.1000 0x5070.1000 0x1000
UC13_1.I2CC 0x4072.1000 0x5072.1000 0x1000
UC13_1.I2CT 0x4074.1000 0x5074.1000 0x1000
UC13_1.SPI 0x4076.1000 0x5076.1000 0x1000
UNICOMM13_2 (UC13_2) 0x4078.2000 0x5078.2000 0x2000
UC13_2.UART 0x4070.3000 0x5070.3000 0x1000
UC13_2.I2CC 0x4072.3000 0x5072.3000 0x1000
UC13_2.I2CT 0x4074.3000 0x5074.3000 0x1000
UC13_2.SPI 0x4076.3000 0x5076.3000 0x1000
UNICOMM13_3 (UC13_3) 0x4078.4000 0x5078.4000 0x2000
UC13_3.UART 0x4070.5000 0x5070.5000 0x1000
UC13_3.I2CC 0x4072.5000 0x5072.5000 0x1000
UC13_3.I2CT 0x4074.5000 0x5074.5000 0x1000
U13_3.SPI 0x4076.5000 0x5076.5000 0x1000
UNICOMM14 (UC14) 0x4078.6000 0x5078.6000 0x2000
UC14.UART 0x4070.7000 0x5070.7000 0x1000
UC14.I2CC 0x4072.7000 0x5072.7000 0x1000
UC14.I2CT 0x4074.7000 0x5074.7000 0x1000
SPG2 0x407A.1000 0x507A.1000 0x1000
SYSCTL 0x400A.F000 0x500A.F000 0x4000
TIMG4_0 0x400C.0000 0x500C.0000 0x2000
TIMG4_1 0x400C.2000 0x500C.2000 0x2000
DEBUGSS 0x400C.7000 0x500C.7000 0x2000
EVENT 0x400C.9000 0x500C.9000 0x3000
IOMUX 0x400C.C000 0x500C.C000 0x2000
LFSS 0x400D.8000 0x500D.8000 0x2000
COMP0 0x400E.0000 0x500E.0000 0x2000
COMP1 0x400E.2000 0x500E.2000 0x2000
VREF 0x400E.8000 0x500E.8000 0x2000
GPIO0 0x400F.0000 0x500F.0000 0x2000
GPIO1 0x400F.2000 0x500F.2000 0x2000
GPIO2 0x400F.4000 0x500F.4000 0x2000
CAN-FD0 0x4011.0000 0x5011.0000 0x8000
CAN-FD1 0x4011.8000 0x5011.8000 0x8000
TIMG4_2 0x4018.0000 0x5018.0000 0x2000
TIMG4_3 0x4018.2000 0x5018.2000 0x2000
TIMG8_0 0x4018.4000 0x5018.4000 0x2000
TIMG8_1 0x4018.6000 0x5018.6000 0x2000
TIMG12_0 0x4018.8000 0x5018.8000 0x2000
I2S0 0x401A.0000 0x501A.0000 0x2000
I2S1 0x401A.2000 0x501A.2000 0x2000
AES 0x401B.0000 0x501B.0000 0x2000
CRC 0x401B.2000 0x501B.2000 0x2000
SHA256 0x401B.4000 0x501B.4000 0x2000
KEYSTORE.CONTROL 0x401B.7000 0x501B.7000 0x1000
PKA 0x401C.0000 0x501C.0000 0x20000
MTB 0x4040.2000 0x5040.2000 0x1000
MTBRAM 0x4040.3000 0x5040.3000 0x0020