The clock module provides the following oscillators:
- LFOSC: Internal low-frequency oscillator (32 kHz)
- SYSOSC: Internal high-frequency oscillator
(4 MHz or 32 MHz with factory trim)
- LFXT/LFCKIN : Low-frequency external crystal oscillator or digital clock input (32 kHz)
- HFXT/HFCKIN: High-frequency external crystal oscillator or digital clock input (4 to 48 MHz)
- SYSPLL: System phase locked loop with 1
output (32 to 160 MHz)
The following clocks are distributed by the clock module for use by the processor, bus, and peripherals:
- MCLK: Main system clock for PD1
peripherals in MCLK domain, derived from SYSOSC, or
HSCLK, active in RUN and SLEEP modes
- MCLK/2: Main system clock for PD1 peripherals in
MCLK/2 domain, derived MCLK and divided by 2
- MCLK/4: Main system clock for PD1 peripherals in
MCLK/4 domain, derived MCLK and divided by 4
- CPUCLK: Clock for the processor (derived from MCLK), active in RUN mode
- ULPCLK: Ultra-low power clock for PD0 peripherals, active in RUN, SLEEP, STOP, and STANDBY modes
- MFCLK: 4-MHz fixed mid-frequency clock for peripherals, available in RUN, SLEEP, and STOP modes
- LFCLK: 32-kHz fixed low-frequency clock
for peripherals or MCLK, active in RUN, SLEEP, STOP,
and STANDBY modes
- CLK_OUT: Used to output a clock externally, available in RUN, SLEEP, STOP, and STANDBY modes
- HFCLK: High-frequency clock derived from HFXT or HFCLK_IN, available in RUN and SLEEP mode
- HSCLK: High-speed clock derived from HFCLK
or the SYSPLL, available in RUN and SLEEP mode
- CANCLK:
CAN functional clock, derived from HFCLK or
SYSPLL
- I2SCLK: I2SCLK functional clock, derived from
HFCLK or SYSPLL
- LFOSCCLK: Used for IWDT & WWDT, derived from
LFOSC
For more details, see the CKM chapter of the
MSPM33
C3-Series 160-MHz Microcontrollers Technical
Reference Manual.