at TA = –40°C to +125°C, VCC = +8.5V
to +23.5V, VEE = –8.5V to –23.5V, AVDD = 5.0V,
DVDD = 1.5V, LVDD = 1.5V, VIO = 1.5V, VOSADJ_ENx =
0, OFS_ENx = 0, ROFS_F = ROFS_S = VOSADJ = AGND
see note for VREFP and VREFN, and all typical
values at TA = 25°C, output unloaded
(unless otherwise noted)
| Bipolar mode, REFP = +5V, REFN =
–5V |
| |
Figure 5-43 Digital Feedthrough Zoomed In
| Gain = 1, reference: ±5V, rising step
of: 100mV |
|
Figure 5-45 Settling Time to 0.1% FSR
| Gain = 1, reference: ±5V, rising step
of: 100mV |
|
Figure 5-47 Settling Time to 0.0015% FSR
| Gain = 1, reference: ±5V, rising step
of: 100mV |
|
Figure 5-49 Settling Time to 0.0004% FSR
| Gain = 1, reference: ±5V, rising step
of: 10V |
|
Figure 5-51 Settling Time to 0.1% FSR
| Gain = 1, reference: ±5V, rising step
of: 10V |
|
Figure 5-53 Settling Time to 0.0015% FSR
| Gain = 1, reference: ±5V, rising step
of: 10V |
|
Figure 5-55 Settling Time to 0.0004% FSR
| Gain = 1, reference: ±20V, rising step
of: 40V |
|
Figure 5-57 Settling Time to 0.1% FSR
| Gain = 1, reference: ±20V, rising step
of: 40V |
|
Figure 5-59 Settling Time to 0.0015% FSR
| Gain = 1, reference: ±20V, rising step
of: 40V |
|
Figure 5-61 Settling Time to 0.0004% FSR
| Gain = 1, excluding R1x and R2x
resistors, bipolar |
|
Figure 5-63 Output Noise vs Frequency
Figure 5-65 0.1Hz to 10Hz Flicker Noise
| REFPx = +5V, REFNx = –5V, bipolar
mode |
|
Figure 5-67 VCC
PSRR vs Frequency
| REFPx = +5V, REFNx = –5V, bipolar
mode |
|
Figure 5-69 AVDD PSRR vs Frequency
Figure 5-71 Slew Rate vs Output Voltage Step, Bipolar
| Bipolar mode, REFP = +5V, REFN =
–5V |
| SCLK = 1MHz, midcode |
Figure 5-44 Digital Feedthrough Zoomed Out
| Gain = 1, reference: ±5V, falling step
of: 100mV |
|
Figure 5-46 Settling Time to 0.1% FSR
| Gain = 1, reference: ±5V, falling step
of: 100mV |
|
Figure 5-48 Settling Time to 0.0015% FSR
| Gain = 1, reference: ±5V, falling step
of: 100mV |
|
Figure 5-50 Settling Time to 0.0004% FSR
| Gain = 1, reference: ±5V, falling step
of: 10V |
|
Figure 5-52 Settling Time to 0.1% FSR
| Gain = 1, reference: ±5V, falling step
of: 10V |
|
Figure 5-54 Settling Time to 0.0015% FSR
| Gain = 1, reference: ±5V, falling step
of: 10V |
|
Figure 5-56 Settling Time to 0.0004% FSR
| Gain = 1, reference: ±20V, falling
step of: 40V |
|
Figure 5-58 Settling Time to 0.1% FSR
| Gain = 1, reference: ±20V, falling
step of: 40V |
|
Figure 5-60 Settling Time to 0.0015% FSR
| Gain = 1, reference: ±20V, falling
step of: 40V |
|
Figure 5-62 Settling Time to 0.0004% FSR
| Gain = 4, excluding R1x and R2x
resistors, bipolar |
|
Figure 5-64 Output Noise vs Frequency
Figure 5-66 0.1Hz to 10Hz Flicker Noise
| REFPx = +5V, REFNx = –5V, bipolar
mode |
|
Figure 5-68 VEE
PSRR vs Frequency
| REFPx = +5V, REFNx = –5V, bipolar
mode |
|
Figure 5-70 LVDD PSRR vs Frequency