SLUAAY0 September   2025 UCC57102 , UCC57102-Q1 , UCC57102Z , UCC57102Z-Q1 , UCC57108 , UCC57108-Q1 , UCC57132 , UCC57132-Q1 , UCC57138 , UCC57138-Q1 , UCC57142 , UCC57142-Q1 , UCC57148 , UCC57148-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TI Non-Isolated SiC MOSFET Gate Drivers Overview
  6. 3SiC MOSFET Gate Driver Design Considerations
    1. 3.1 Undervoltage Lockout (UVLO)
    2. 3.2 Negative Bias Supply (Bipolar Drive)
    3. 3.3 Short-Circuit Protection
      1. 3.3.1 Desaturation Protection
      2. 3.3.2 Overcurrent Protection
      3. 3.3.3 Soft Turn-Off
  7. 4PFC CCM Boost Low-Side Gate Driver Example
    1. 4.1 Gate Driver Requirements
    2. 4.2 Gate Driver Selection
    3. 4.3 Gate Driver Power Dissipation
  8. 5Summary
  9. 6References

4.2 Gate Driver Selection

The UCC57132B is preferred for this application. The UCC57132B is a 30V low-side gate driver with 3A source/sink peak current rating, OCP, and fault report. The UCC57132B also accommodates negative bias input, detects OCP with fault indication, and has a high UVLO threshold of 13.5V (typ).

The bypass capacitors for the bias supply are critical components to consider when designing the UCC57132B into the system. These bypass capacitors need to be as close as possible to VDD/VEE pin and GND pin of the UCC57132B to increase noise immunity. TI recommends having at least two bypass capacitors in parallel, where the first capacitor is 0.1uF, and the second capacitor is 1uF or larger (0.1uF capacitor must be closer to the IC than the larger capacitor). Adding a small bypass capacitor or RC filter on the IN pin to increase noise immunity for the input PWM signal is useful.

The OCP pin has a 500mV threshold, which can be used to calculate the shunt resistor value. The SiC MOSFET has a maximum continuous ID rating at Tc = 100C of 35A, leave room for margin; the shunt resistor can be calculated to be 25mΩ ( = 500 m V / 20 A ) . An addition of a small RC filter close to the OCP pin can help mitigate noise that falsely triggers OCP.

The fault signal recovery time is calculated by the RC filter at the EN/FLT pin using Equation 4. RENU refers to the internal pull-up resistance of the EN/FLT pin, and VENH refers to the enable signal rising threshold. Both values can be found in the UCC57132B data sheet (RENU = 2MΩ and VENH = 2.2V). Using RFLTC = 5kΩ and CFLTC = 100pF, the fault recovery time can be calculated as tFLTC = 58ns.

Equation 4. t F L T C = - ( R F L T C × R E N U R F L T C + R E N U ) × C F L T C × ln ( 1 - V E N H V D D )

Adding an external gate resistor has several benefits. Gate resistors limit the output turn-on and turn-off time, reducing EMI, and takes on some of the gate-charge-related power dissipation. The UCC57132B does not have split output feature to individually control turn-on and turn-off time, but a blocking diode can be used to simulate split outputs. Selecting a gate resistor involves experimenting with bench testing, but a good starting point is 2.2Ω for turn-on and 1.1Ω for turn-off (effective with blocking diode by paralleling two 2.2Ω resistors).

Figure 4-2 shows the design values for the UCC57132B. Careful testing is required to validate the component values, and modification can be required accordingly.

UCC57132B With Design Values Figure 4-2 UCC57132B With Design Values