SLVAFD0C May   2022  – August 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , TPS65219 , TPS65219-Q1 , TPS65220

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. TPS65219 Overview
    1. 2.1 TPS65219 Functional Block Diagram
  6. TPS65219 Variants
    1. 3.1 TPS65219 NVMs for Industrial Applications
    2. 3.2 TPS65219-Q1 NVMs for Automotive Applications
  7. TPS6521905 User-Programmable NVM
  8. AM62x Core Voltage Selection
  9. VSYS Voltage Ramp
  10. Power Block Diagrams
    1. 7.1 TPS6521901 Powering AM62x
    2. 7.2 TPS6521902 Powering AM62x
    3. 7.3 TPS6521903 Powering AM62x
    4. 7.4 TPS6521904 Powering AM62x
    5. 7.5 TPS6521907 Powering AM62x
    6. 7.6 TPS6521908 Powering AM62x
    7. 7.7 TPS6521920W-Q1 Powering AM62x-Q1
    8. 7.8 TPS6521922W-Q1 Powering AM62x-Q1
    9. 7.9 TPS6521923W-Q1 Powering AM62x-Q1
  11. Summary
  12. References
  13. 10Revision History

Introduction

The TPS65219 PMIC is a cost and space optimized implementation developed to power the AM62x processor and the principal peripherals. TPS65219 has flexible mapping and comes in several factory programmed orderable part numbers to support different AM62x use cases. A hardware implementation is readily available with the AM62x SK EVM. The AM62x is the latest in the Sitara™ family of Arm® processors, built with features to support embedded 3D graphics acceleration, dual display interfaces, and extensive peripheral and networking options. To be used in applications from Human Machine Interfaces (HMI) to 3D Point Cloud, this processor provides powerful computing while supporting power management features designed for portable or power-sensitive systems. The AM62x processor requires at minimum power for seven main rails. These include the core supply (VDD_CORE), RAM supply (VDDR_CORE), DDR PHY IO supply (VDDS_DDR), 1.8V VDDA analog supply and the 1.8V or 3.3V IO supplies and analog IO rails (VDDSHV). Powering a processor such as the AM62x family demands requirements such as sufficient current headroom, tight transient requirements, and a number of rails that can be fully controlled for power up and power down sequencing. In the event of any inconsistency between any user's guide, application report, or other referenced material, the data sheet specification is the definitive source.