SLVSIM8A June   2025  – December 2025 DRV8363-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Functions 48-Pin DRV8363-Q1
  6. 5 Specification
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information 1pkg
    4. 5.4 Electrical Characteristics
    5. 5.5 SPI Timing Requirements
    6. 5.6 SPI Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Three BLDC Gate Drivers
        1. 6.3.1.1 PWM Control Modes
          1. 6.3.1.1.1 6x PWM Mode
          2. 6.3.1.1.2 3x PWM Mode with INLx enable control
          3. 6.3.1.1.3 1x PWM Mode
        2. 6.3.1.2 Gate Drive Architecture
          1. 6.3.1.2.1 Bootstrap diode
          2. 6.3.1.2.2 VCP Trickle Charge pump
          3. 6.3.1.2.3 Gate Driver Output
          4. 6.3.1.2.4 Passive and Semi-active pull-down resistor
          5. 6.3.1.2.5 TDRIVE/IDRIVE Gate Drive Timing Control
          6. 6.3.1.2.6 Propagation Delay
          7. 6.3.1.2.7 Deadtime and Cross-Conduction Prevention
      2. 6.3.2 DVDD Linear Voltage Regulator
      3. 6.3.3 Low-Side Current Sense Amplifiers
        1. 6.3.3.1 Unidirectional Current Sense Operation
        2. 6.3.3.2 Bidirectional Current Sense Operation
      4. 6.3.4 Gate Driver Shutdown
        1. 6.3.4.1 DRVOFF Gate Driver Shutdown
        2. 6.3.4.2 Soft Shutdown Timing Sequence
      5. 6.3.5 Active Short Circuit
      6. 6.3.6 Gate Driver Protective Circuits
        1. 6.3.6.1  GVDD Undervoltage Lockout (GVDD_UV)
        2. 6.3.6.2  GVDD Overvoltage Fault (GVDD_OV)
        3. 6.3.6.3  VDRAIN Undervoltage Fault (VDRAIN_UV)
        4. 6.3.6.4  VDRAIN Overvoltage Fault (VDRAIN_OV)
        5. 6.3.6.5  VCP Undervoltage Fault (CP_OV)
        6. 6.3.6.6  BST Undervoltage Lockout (BST_UV)
        7. 6.3.6.7  MOSFET VDS Overcurrent Protection (VDS_OCP)
        8. 6.3.6.8  MOSFET VGS Monitoring Protection
        9. 6.3.6.9  Shunt Overcurrent Protection (SNS_OCP)
        10. 6.3.6.10 Thermal Shutdown (OTSD)
        11. 6.3.6.11 Thermal Warning (OTW)
        12. 6.3.6.12 OTP CRC
        13. 6.3.6.13 SPI Watchdog Timer
        14. 6.3.6.14 Phase Diagnostic
    4. 6.4 Fault Detection and Response Summary Table (Fault Table)
    5. 6.5 Device Functional Modes
      1. 6.5.1 Gate Driver Functional Modes
        1. 6.5.1.1 Sleep Mode
        2. 6.5.1.2 Standby Mode
        3. 6.5.1.3 Active Mode
    6. 6.6 Programming
      1. 6.6.1 SPI
      2. 6.6.2 SPI Format
      3. 6.6.3 SPI Format Diagrams
    7. 6.7 Register Maps
      1. 6.7.1 STATUS Registers
      2. 6.7.2 CONTROL Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Typical Application with 48-pin package
        1. 7.2.1.1 External Components
      2. 7.2.2 Application Curves
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 10.1 Tape and Reel Information

7.2.1.1 External Components

External components lists the recommended external components.

Table 7-1 External Components (48-pin Package)
COMPONENTPIN1PIN2RECOMMENDED
CGVDDGVDDGND10-μF ceramic capacitor rated for GVDD.
CDVDDDVDDGND1.0-μF ceramic capacitor rated for DVDD voltage
CCPT_FLYCPTHCPTL1.0-μF ceramic capacitor rated for GVDD voltage
CVCPVCPVDRAIN1.0-μF ceramic capacitor rated for GVDD voltage
RnFAULTVCCIOnFAULT10 kΩ pulled up the MCU I/O power supply or DVDD
CVREFVREFGND0.1-μF ceramic capacitor rated for VREF voltage
CBULKVMOTORGND100-μF - 1000-μF rated for VMOTOR; Depending on system configuration
CVDRAINVDRAINGND1-μF rated for VDRAIN
CBSTBSTxSHx1.0-μF, 20-V ceramic capacitor between BSTx and SHx depending on the total gate charge of external MOSFET Qg. CBST > 40 X Qg / (VGHX-VSHx)
RBSTBSTxSHxOPTIONAL: 3-Ω series resistor between BSTx and SHx to help prevent CBST from being overcharged if big negative transient voltage is observed on SHx pin.
RGGHx, GLxGate of external MOSFETOPTIONAL: 2-Ω series resistor between GHx/GLx and Gate of external MOSFET.
RGSGHx, GLxSource of external MOSFETOPTIONAL: 100-kΩ pull down resistor between GHx/GLx and Source of external MOSFET.
RSENSESPxSNx0.5-mΩ Shunt resistor for current sense amplifier. System design parameter.
RSOMCU ADCSOx160-Ω for current sense amplifier output filter
CSOMCU ADCGND470-pF ceramic capacitor rated for VREF for current sense amplifier output filter
RSP, RSNSPx/SNxRSENSEOPTIONAL: 10-Ω for current sense amplifier input filter.
CSPSNSPxSNxOPTIONAL: 1-nF ceramic capacitor for current sense amplifier input filter.
CSP, CSNSPx/SNxGNDOPTIONAL: 1-nF ceramic capacitor for current sense amplifier input filter.