The device uses a serial peripheral interface (SPI) bus to set device configurations, operating parameters, and read out diagnostic information. The device SPI operates in secondary mode and connects to an external controller. If SPI CRC (SPI_CRC_EN = 0b) is enabled, the SPI input data (SDI) word consists of a 24 bit word, with one read/write bit, one parity bit, 6-bit address, and 16 bits of data. The SPI output data (SDO) word consists of a 24 bit word, with an 8-bit status data, and 16 bits of register data. If SPI CRC is enabled (SPI_CRC_EN = 1b), an additional 8 bit CRC (initial value 0xFF, polynomial 0x2F) is added to the end of the frame, increasing the total SPI data word length to 32 bits.

A valid frame must meet the following conditions:

• The SCLK pin is low when the nSCS pin transitions from high to low and from low to high.
• The nSCS pin is pulled high for at least 400ns between words.
• When the nSCS pin is pulled high, any signals at the SCLK and SDI pins are ignored and the SDO pin is set Hi-Z.
• Data is captured on the falling edge of SCLK and data is propagated on the rising edge of SCLK.
• The most significant bit (MSB) is shifted in and out first.
• A full 24 (or 32) SCLK cycles must occur for transaction to be valid.
• If the data word sent to the SDI pin is not 24 (or 32) bits, a frame error occurs and the data word is ignored.
• For a write command, the existing data in the register being written to is shifted out on the SDO pin following the 8 bit command data.
• The SDO pin is a push-pull type output.
• The SPI fault is confirmed at the rising edge of nSCS.