SLVSL35 September   2026 TUSB2514B

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Battery Charging Features
      2. 6.3.2 USB Power Management
      3. 6.3.3 Clock Generation
        1. 6.3.3.1 Crystal Requirements
        2. 6.3.3.2 Input Clock Requirements
      4. 6.3.4 Power-Up and Reset
    4. 6.4 Device Functional Modes
      1. 6.4.1 I2C EEPROM Operation
      2. 6.4.2 SMBus Target Operation
      3. 6.4.3 Port Configuration
  8. 7 Register Maps
    1. 7.1 TUSB2514 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 TUSB2514B Power Supply
      2. 8.3.2 Downstream Port Power
      3. 8.3.3 Ground
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Placement
        2. 8.4.1.2 Package Specific
        3. 8.4.1.3 Differential Pairs
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions


TUSB2514B RHH Package, 36-pin VQFN (Top View)

Figure 4-1 RHH Package, 36-pin VQFN (Top View)
Table 4-1 Pin Functions
PINI/O(1)TYPE(1)DESCRIPTION
NAMENO.
USB_DM_DN1/PRT_DIS_N11I/O—USB high-speed differential transceiver (negative)
USB_DM_DN2/PRT_DIS_N23
USB_DM_DN3/PRT_DIS_N36This pin is sampled at GRST# to determine if the port is disabled. To disable a port, pull both positive and negative pins to 3.3V with 10kΩ pullup resistor for the corresponding port number.
USB_DM_DN4/PRT_DIS_N48
USB_DP_DN1/PRT_DIS_P12I/O—USB high-speed differential transceiver (positive)
USB_DP_DN2/PRT_DIS_P24
USB_DP_DN3/PRT_DIS_P37This pin is sampled at GRST# to determine if the port is disabled. To disable a port, pull both positive and negative pins to 3.3V with 10kΩ pullup resistor for the corresponding port number.
USB_DP_DN4/PRT_DIS_P49
VDDA335, 10—PWR3.3V analog power rail
VDD33 15,23,29,36 — PWR 3.3V power rail
TEST 11 I PD This pin is reserved for factory test. Leave unconnected; an inernal pulldown resistor holds this pin low.
PWRCTL1/BATEN112I/OPDUSB port 1 power-on control for downstream power and battery charging enable. The pin is used as an input to the downstream power switch for port 1.
The value of the pin is sampled at the deassertion of GRST# to determine the value of the battery charging support for Port 1 indicated in the Battery Charging Support register.
0 = Battery charging not supported
1 = Battery charging supported
OVERCUR1#13IPUUSB port 1 overcurrent detection. This pin is used to connect the overcurrent output of the downstream port power switch for port 1.
0 = An overcurrent event occurred.
1 = An overcurrent event has not occurred.
If power management is not implemented, leave this pin unconnected.
NC14I—This pin can be left unconnected or tied to GND through a capacitor.
PWRCTL2/BATEN216I/OPDUSB port 2 power-on control for downstream power and battery charging enable. The pin is used as an input to the downstream power switch for port 2.
The value of the pin is sampled at the deassertion of GRST# to determine the value of the battery charging support for Port 2 indicated in the Battery Charging Support register.
0 = Battery charging not supported
1 = Battery charging supported
OVERCUR2#17IPUUSB port 2 overcurrent detection. This pin is used to connect the overcurrent output of the downstream port power switch for port 2.
0 = An overcurrent event occurred.
1 = An overcurrent event has not occurred.
If power management is not implemented, leave this pin unconnected.
PWRCTL3/BATEN318I/OPDUSB port 3 power-on control for downstream power and battery charging enable. The pin is used as an input to the downstream power switch for port 3.
The value of the pin is sampled at the deassertion of GRST# to determine the value of the battery charging support for Port 3 indicated in the Battery Charging Support register.
0 = Battery charging not supported
1 = Battery charging supported
OVERCUR3#19IPUUSB port 3 overcurrent detection. This pin is used to connect the overcurrent output of the downstream port power switch for port 3.
0 = An overcurrent event occurred.
1 = An overcurrent event has not occurred.
If power management is not implemented, leave this pin unconnected.
PWRCTL4/BATEN420I/OPDUSB port 4 power-on control for downstream power and battery charging enable. The pin is used as an input to the downstream power switch for port 4.
The value of the pin is sampled at the deassertion of GRST# to determine the value of the battery charging support for Port 4 indicated in the Battery Charging Support register.
0 = Battery charging not supported
1 = Battery charging supported
OVERCUR4#21IPUUSB port 4 overcurrent detection. This pin is used to connect the overcurrent output of the downstream port power switch for port 4.
0 = An overcurrent event occurred.
1 = An overcurrent event has not occurred.
If power management is not implemented, leave this pin unconnected.
SDA_SMBDAT/NON_REM122I/OPDI2C data or SMBus data.
When configured for pin-strap mode, this pin, along with NON_REM0, determines which downstream ports are marked non-removable as described in Table 6-4.
SCL_SMBCLK/CFG024I/OPDI2C clock or SMBus clock.
At the rising edge of GRST#, this pin is sampled along with CFG1 to determine I2C, SMBus, or pin-strap operation as described in Table 6-2.
HS_UP/
CFG1		25I/OPDAfter reset, this signal indicates the high-speed USB connection status of the upstream port as described in Table 6-4.
At the rising edge of GRST#, this pin is sampled along with CFG0 to determine I2C, SMBus, or pin-strap operation as described in Table 6-2.
GRST#26I—Global power reset. This reset brings all of the TUSB2514B internal registers to the default states. When GRST# is asserted, the device is completely nonfunctional. See Section 6.3.4 for reset timing requirements.
USB_VBUS27I—USB upstream port power monitor. The VBUS detection requires a voltage divider. In a detachable hub application, USB_VBUS can be connected to VBUS through a 90.9kΩ ±1% resistor and to ground through a 10kΩ ±1% resistor from the signal to ground. In a self-powered application, it can be controlled by the permanently attached host or connected to 3.3V through a 47kΩ ±1% resistor and to ground through a 10kΩ ±1% resistor from the signal to ground.
HS_SUSPEND/
NON_REM0		28I/OPDWhen configured for pin-strap mode, this pins, along with NON_REM1, determines which downstream ports are marked non-removable as described in Table 6-4.
If SMBus is selected, this pin functions as a HS_SUSPEND (upstream HS suspend indicator) as described in Table 6-4.
USB_DM_UP30I/O—USB high-speed differential transceiver (negative)
USB_DP_UP31I/O—USB high-speed differential transceiver (positive)
XO32O—24MHz Crystal output. This pin is the crystal output for the internal oscillator. If the XI pin is driven by an external oscillator, this pin can be left unconnected. When using a crystal, a 1MΩ feedback resistor is required between the XI and XO pins.
XI/CLK33I—24MHz Crystal input. This pin is the crystal input for the internal oscillator. The input can alternately be driven by the output of an external oscillator. When using a crystal, a 1MΩ feedback resistor is required between the XI and XO pins.
LDO_FILT34I—LDO Filter Capacitor: this pin must have up to a 2.2µF capacitor to VSS.
USB_R135I—Precision resistor reference. Connect a 9.53kΩ ±1% resistor between this pin and GND.
Thermal Pad—GNDGround. The thermal pad must be connected to ground.
(1) I = Input, O = Output, I/O = Input/output, PU = Internal pull-up resistor, PD = Internal pull-down resistor, and PWR = Power signal, GND = ground