SLVSL35 September   2026 TUSB2514B

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Battery Charging Features
      2. 6.3.2 USB Power Management
      3. 6.3.3 Clock Generation
        1. 6.3.3.1 Crystal Requirements
        2. 6.3.3.2 Input Clock Requirements
      4. 6.3.4 Power-Up and Reset
    4. 6.4 Device Functional Modes
      1. 6.4.1 I2C EEPROM Operation
      2. 6.4.2 SMBus Target Operation
      3. 6.4.3 Port Configuration
  8. 7 Register Maps
    1. 7.1 TUSB2514 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 TUSB2514B Power Supply
      2. 8.3.2 Downstream Port Power
      3. 8.3.3 Ground
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Placement
        2. 8.4.1.2 Package Specific
        3. 8.4.1.3 Differential Pairs
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOW POWER MODES
IDD33_SUSPEND VDD33 current in suspend VDD = 1.1V; VDD33 = 3.3V; TA = 25°C; 8 16 30 mA
ACTIVE POWER MODES
IDD33_SMBUS VDD33 current during SMbus programming VDD33 = 3.3V; TA = 25°C; 50 mA
IDD33_2H_0SS_1HS VDD33 current upstream port connected to USB 2.0 Host, downstream port(s) connected to 1 HS device. VDD33 = 3.3V; TA = 25°C; 100 mA
IDD33_2H_0SS_4HS VDD33 current upstream port connected to USB 2.0 Host, downstream port(s) connected to 4 HS device. VDD33 = 3.3V; TA = 25°C; 115 140 170 mA
3.3V I/O
VIH High-level input voltage(1) 2 3.6 V
VIL Low-level input voltage(1) 0 0.4 0.8 V
tt Input transition time (tRISE and tFALL) 10 25 ns
VHYS Input hysteresis(2) 0.468 V
VOH, IO High-level output voltage IOH = –4 mA 2.4 3.3 V
VOL, IO Low-level output voltage IOH = 4 mA .05 0.4 V
IOZP High-impedance output current with internal pullup or pulldown resistor.(3) VI = 0 to VDD33; –350 350 µA
II, IO Input current(4) VI = 0 to VDD33; –15 15 µA
RPD, IO Internal pulldown resistance 7 11 18 kΩ
RPU, IO Internal pullup resistance 9 14 18 kΩ
(1) Applies to external inputs and bidirectional buffers
(2) Applies to GRST#
(3) Applies to pins with internal pullups/pulldowns.
(4) Applies to external input buffers