SPRACR3A april   2020  – may 2023 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   CRC Engines in C2000 Devices
  2.   Trademarks
  3. Introduction
    1. 1.1 Acronyms
  4. BGCRC
  5. GCRC
  6. VCU CRC
  7. ERAD CRC
  8. CLA CRC (PSA)
    1. 6.1 CLA PSA
      1. 6.1.1 PSA for PAB
      2. 6.1.2 PSA for DWDB
      3. 6.1.3 Considerations While Computing the PSA
  9. CLA-PROMCRC – CLA Program Integrity check
  10. CRC Calculation Using Software
  11. CRC Recommendation for Use-Cases
  12. 10CRC Modules Comparison
  13. 11CRC Engines vs Devices Mapping Table
  14. 12References
  15. 13Revision History

CRC Modules Comparison

Table 10-1 Properties of CRC Engines
Properties of CRC enginesBGCRCGCRCVCU CRCERAD CRCCLA PSA
Accessible coresC28x, CLACMC28xC28xCLA
CRC polynomial(s) usedFixed value = 0x04C11DB7User-programmable (up to 32 -bit polynomial)• 8-bit - 0x07
• 16-bit - CRC16 802.15.4, 0x8005, CRC-CCITT, 0x1021
• 24-bit - 0x5d6dcb
• 32-bit - CCITT-32, 0x04C11DB7, 0x1EDC6F41
VCRC supports user configurable size of data and configurable polynomials (value and size (up to 32 bits))
Fixed polynomialPAB : 1 + x + x2 + x22 + x32 (0x00400007)
DWDB: polynomial is configurable
PSA mode : 1 + x + x2 + x22 + x32 (0x00400007)
CRC32 mode : 1 + x + x2 + x4 + x5 + x7 + x8 + x10 + x11 + x12 + x16 + x22 + x23 + x26 + x32 (0x04C11DB7)
CRC-16-IBM : 1 + x2 + x15 + x16 (0x8005)
CRC16-CCITT : 1 + x5 + x12 + x16 (0x1021)
Seed valueUser-programmableUser-programmableUser-programmableUser-programmableUser-programmable
Input sizeMultiples of 256 Bytes
Min : 256 Bytes
Max : 256 KBytes
Any sizeAny size-Any size
Reverse bit order (reflected input)NoYesYesNoNo
Number of cycles for CRC computation1 cycle per 32-bit wordFixed polynomial : 1 cycle per 32-bit word
Others : 2n+2 cycles for n bytes of data
Fixed polynomials - 1 cycle per byte
Configurable polynomials - 3 cycles for 1-8 bits
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Mode of data accessDirect access to memoryCPU/DMA needs to write the data one by one to a specific register in GCRCDirect access to memoryMonitoring bus accessMonitoring bus access