SPRACZ9A November   2021  – December 2022 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   Hardware Design Guide for F2800x Devices
  2.   Trademarks
  3. 1Introduction
  4. 2Typical F2800x System Block Diagram
  5. 3Schematic Design
    1. 3.1 Package and Device Decision
      1. 3.1.1 F2800x Devices
        1. 3.1.1.1 TMS320F28004x
        2. 3.1.1.2 TMS320F28002x
        3. 3.1.1.3 TMS320F28003x
        4. 3.1.1.4 TMS320F280013x
      2. 3.1.2 Migration Guides
      3. 3.1.3 PinMux Tool
      4. 3.1.4 Configurable Logic Block
    2. 3.2 Digital IOs
      1. 3.2.1 General Purpose Input/Outputs
      2. 3.2.2 Integrated Peripherals and X-BARs
      3. 3.2.3 Control Peripherals
      4. 3.2.4 Communication Peripherals
      5. 3.2.5 Boot Pins and Boot Peripherals
    3. 3.3 Analog IOs
      1. 3.3.1 Analog Peripherals
      2. 3.3.2 Choosing Analog Pins
      3. 3.3.3 Internal vs. External Analog Reference
      4. 3.3.4 ADC Inputs
      5. 3.3.5 Driving Options
      6. 3.3.6 Low-Pass/Anti-Aliasing Filters
    4. 3.4 Power Supply
      1. 3.4.1 Power Requirements
      2. 3.4.2 Power Sequencing
      3. 3.4.3 VDD Voltage Regulator
        1. 3.4.3.1 Internal vs. External Regulator
        2. 3.4.3.2 Internal LDO vs. Internal DC-DC Regulator
      4. 3.4.4 Power Consumption
      5. 3.4.5 Power Calculations
    5. 3.5 XRSn and System Reset
    6. 3.6 Clocking
      1. 3.6.1 Internal vs. External Oscillator
    7. 3.7 Debugging and Emulation
      1. 3.7.1 JTAG/cJTAG
      2. 3.7.2 Debug Probe
    8. 3.8 Unused Pins
  6. 4PCB Layout Design
    1. 4.1 Layout Design Overview
      1. 4.1.1 Recommend Layout Practices
      2. 4.1.2 Board Dimensions
      3. 4.1.3 Layer Stack-Up
    2. 4.2 Recommended Board Layout
    3. 4.3 Placing Components
      1. 4.3.1 Power Electronic Considerations
    4. 4.4 Ground Plane
    5. 4.5 Analog and Digital Separation
    6. 4.6 Signal Routing With Traces and Vias
    7. 4.7 Thermal Considerations
  7. 5EOS, EMI/EMC, and ESD Considerations
    1. 5.1 Electrical Overstress
    2. 5.2 Electromagnetic Interference and Electromagnetic Compatibility
    3. 5.3 Electrostatic Discharge
  8. 6Final Details and Checklist
  9. 7References
  10. 8Revision History

3.4.3.2 Internal LDO vs. Internal DC-DC Regulator

F28004x contains both an internal 1.2 V LDO voltage regulator (VREG) and an internal 1.2 V switching regulator (DC-DC). When implementing this device into a system, deciding between the internal LDO and the internal DC-DC solutions for the 1.2 V power rail is an important design decision when an external supply is not desired. The DC-DC regulator is significantly more efficient than the LDO, with the DC-DC regulator having 80% efficiency compared to the LDO regulator’s 30% efficiency. However, the DC-DC solution comes with a few trade-offs. Depending on the board layout, there is the potential for analog performance degradation, mostly impacting the ADC. Additionally, the DC-DC requires an external inductor and capacitors to function, leading to increased component cost. Finally, GPIO22 and will be occupied by VFBSW and GPIO23 by VSW, leading to reduced I/Os on the board. Overall, the DC-DC voltage regulator is useful for systems which require efficient voltage regulation and reduced noise (since its switching is external to the MCU) and where the additional component cost is not an issue.

Figure 3-10 (also found in the TMS320F28004x Real-Time Microcontrollers Data Sheet) showcases the recommended design and required additional components when using the DC-DC regulator. Of special note is that an external connection should be made from the output of the internal DC-DC regulator to the VDD rail.

GUID-20211119-SS0I-F3N9-NBVP-WRR1GNKLRCQP-low.png Figure 3-10 DC-DC Regulator Circuit Schematic