Electromagnetic compatibility (EMC) describes the ability of electronic components to function properly amidst interferences and disturbances from other systems. The most pertinent to consider is electromagnetic interference (EMI), which is radio frequency energy that is emitted by the device and other nearby devices. This disturbance can propagate and impact the device through conduction and radiation.

Thus, when designing a system, it is important to ensure that the EMI emitted by the board from both radiation and conduction does not exceed the maximum allowed per regulated standards. Hardware designers should work to minimize radiated and conducted EMI to levels far below the limits for certification. Similarly, the board should be designed with adequate shielding to function properly even whilst being in contact with radiated and conducted electromagnetic energy from other systems around it.

Most components in the system, including the PCB, connectors, cables, and so forth, serve as a source of EMI. Especially when designing a board that makes use of high frequencies and fast-switching currents and voltages, all of the traces essentially act as antennas which radiate electromagnetic energy. The five main sources of radiation are: digital signals propagating on traces, current return loop areas, inadequate power supply filtering or decoupling, transmission line effects, and lack of power and ground planes. Fast switching clocks, external buses, and PWM signals are used as control outputs and in switching power supplies. The power supply is another major contributor to EMI. RF signals can propagate from one section of the board to another, building up EMI. Switching power supplies radiate the energy which can fail the EMI test.

To reduce any unwanted EMI generated by the board and its components, follow these guidelines throughout the schematic and layout design process:

• Use multiple decoupling capacitors with different values and appropriate power supply decoupling techniques. Be aware that every capacitor has a self-resonant frequency.
• Provide adequate filter capacitors on the power supply source. These capacitors and decoupling capacitors should have low equivalent series inductance (ESL).
• Create ground planes if there are spaces available on the routing layers. Connect these ground areas to the ground plane with vias; creating a quarter-inch via grid is ideal.
• The high frequency signals (lower address lines, clock signals, serial ports and so forth) are usually terminated by a CMOS input, which is a load of > 100 K parallel with typically 10 pF. Charging/discharging of such a load results in high current peak. A possible fix is to add a series termination resistor (about 50Ω) and fine tune the resistors for optimal signal integrity. As per the transmission line theory, if the total output resistance (internal + external) is less than the line impedance (typically 70Ω–120Ω), it has no negative influence on speed. In general, reduce the risetime of the signal if timing is not critical by adding a series termination resistor. Substantial benefits can be achieved with this approach at a low cost.
• Typically, PWM signals driving a 3-phase H-bridge switch on and off cause current spikes. Symmetrical PWM reduces EMI related to dU/dt and di/dt by approximately 66% compared to asymmetrical PWM. The space vector PWM is symmetrical with respect to the PWM period, too. However, since only two transistors are switched during one PWM period, the switching losses as well as the EMI radiation are reduced by 30% compared to the symmetric PWM.
• Keep the current loops as small as possible. Add as many required decoupling capacitors as possible. Always apply current return rules to reduce loop areas.
• Keep high-speed signals away from other signals and especially away from input and output ports or connectors.
• Apply current return rules to connect the grounds together while isolating the ground plane for the analog portion. If the project does not use ADC and there are no analog circuits, do not isolate grounds.
• Avoid connecting the ground splits with a ferrite bead. At high frequencies, a ferrite bead has high impedance and creates a large ground potential difference between the planes or PC board stack-up, add as many power and ground planes as possible. Keep the power and ground planes next to each other to ensure low-impedance stack-up or large natural capacitance stack-up.
• Add an EMI pi filter on all the signals exiting the box or entering the box.
• If the system fails EMI tests, find the source by tracing the failed frequencies to their source. For example, assume the design fails at 300 MHz but there is nothing on the board running at that frequency. The source is likely to be a third harmonic of a 100 MHz signal.
• Determine if the failed frequencies are common mode or differential mode. Remove all the cables connected to the box. If the radiation changes, it is common mode. If not, then it is differential mode. Then, go to the source and use termination or decoupling techniques to reduce the radiation. If it is common mode, add pi filters to the inputs and outputs. Adding a common choke onto the cable is an effective solution but an expensive method for EMI reduction.

For additional information on reducing EMI/EMC issues throughout the PCB design process, see the PCB Design Guidelines for Reduced EMI and Printed-Circuit-Board Layout for Improved Electromagnetic Compatibility.