SPRAD21E May 2023 – February 2024 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1
Provide series resistors (22 Ω) for clock outputs SPI0..2_CLK (MCSPI 0..2) and MCU_SPI0..1_CLK (MCU_MCSPI 0..1) (close to processor).
Provide series resistors (22 Ω) for transmit clock outputs MCASP0..2_ACLKX and Transmit Frame Sync signals MCASP0..2_AFSX (close to processor).
Provide series resistors (22 Ω) for receiver clock outputs MCASP0..2_ACLKR and Receive Frame Sync signals MCASP0..2_AFSR (close to attached device).
Processor IO buffers are disabled during power-up. Verify if external parallel pulls are provided for Chip Select signals SPI0..2_CS0..3 (MCSPI 0..2) & MCU_SPI0..1_CS0..3 (MCU MCSPI 0..1) (close to attached device). Pulls for device clock and data inputs are use case dependent and needs to be verified when selecting the attached device.