SPRAD21E May 2023 – February 2024 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1
MCU_PORz is the external MCU and Main Domain cold reset input to the processor. It is recommended to keep the MCU_PORz pulled low during the supply ramp and oscillator start-up. Follow the recommended MCU_PORz timing in the Power-Up Sequencing diagram of the device-specific data sheet.
For MCU_PORz (3.3 V tolerant, fail-safe input), a 3.3 V input can be applied. The input thresholds are a function of the 1.8 V IO supply voltage (VDDS_OSC0).
Usage note for MCU_RESETz:Refer silicon errata advisory i2407- RESET: MCU_RESETSTATz unreliable when MCU_RESETz is asserted low
Connect external warm reset inputs MCU_RESETz and RESET_REQz as per the Pin Connectivity Requirements section of the device-specific data sheet. Warm reset inputs (LVCMOS inputs) have input slew rate requirements. Connecting a capacitor directly at the input is not recommended due to the slow input ramp. A schmitt trigger based debouncing circuit is recommended. For implementing the debouncing logic, see the device-specific SK schematics.